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ARMv7 Generic Timers: Difference between revisions
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* Hypervisor timer.
* Virtual timer.
= System counters =
The GT's physical upcounter is specified to present the following behaviour to software:
* At least 56 bits wide. Any read from the upcounter is ''zero-extended'' to 64 bits.
* The upcounter increments at a fixed frequency, with architecturally supported ranges being from 1-50 MHz.
* Supports clock multiplication to save power. I.e, the hardware crystal may operate at a lower frequency than the frequency claimed by the platform, and a multiplier may applied to the readout value to present the illusion of operation at a higher frequency. The underlying crystal's frequency may change dynamically at runtime.
* Roll-over time is guaranteed to be at least 40 years.
* Clock drift is not required to be at any level of accuracy, but ARM <tt>RECOMMENDS</tt> that drift be not greater than 10 seconds per 24 hours. The use of clock multiplication must not change the drift behaviour of the upcounter.
* The upcounter is architecturally specified to begin counting from 0 at #RESET.
* The upcounter must be implemented in the always-on power domain.
All agents (including devices in the system other than the host processors) reading the system upcounter must be presented with a uniform view of passing time.
The <tt>CNTFREQ</tt> register is only ''writeable'' by ''secure'' PL1 mode software, and must be initialized to state the frequency of the system upcounter.
<tt>CNTFREQ</tt> is ''readable'' by PL2, secure and non-secure PL1 by default. <tt>CNTKCTL.PL0PCTEN</tt> enables <tt>CNTFREQ</tt> to be read from secure and non-secure PL0.
= Timers =
* The timers can be used as either count-up or count-down timers.
* The timers can operate in either physical or virtual time.
* The timers output signals can be configured as level-sensitive PPI IRQ signals to the GICC.
*
= Registers =
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