ARMv7 Generic Timers

This page is current with the description of the ARM Generic Timer behaviour specified in the ARMv7 manual. There may have been differences introduced in ARMv8 and AArch64. This page does not take such differences, if they exist, into account.

Overview

The ARM Generic Timers (henceforth, "GT") are architecturally specified in ARMv7 as an OPTIONAL extension to the ARMv7-a and ARMv7-r streams. The feature is specified to provide a timestamp-counter (upcounter) reference which operates independent of the CPU clock's frequency, allowing for TSC measurements which are invariant over time, regardless of processor scaling, power state and throttling.

This upcounter can be read in two forms:

• Physical upcounter readout ("Physical counter").
• Virtual upcounter readout ("Virtual counter"). This is the value of the physical timer, minus a 64-bit virtual offset.

The feature also specifies a set of 4 timers per CPU which base their operation on these two upcounters:

• Secure Thysical timer.
• Non-secure Physical timer.
• Hypervisor timer.
• Virtual timer.

System counters

The GT's physical upcounter is specified to present the following behaviour to software:

• At least 56 bits wide. Any read from the upcounter is zero-extended to 64 bits.
• The upcounter increments at a fixed frequency, with architecturally supported ranges being from 1-50 MHz.
• Supports clock multiplication to save power. I.e, the hardware crystal may operate at a lower frequency than the frequency claimed by the platform, and a multiplier may applied to the readout value to present the illusion of operation at a higher frequency. The underlying crystal's frequency may change dynamically at runtime.
• Roll-over time is guaranteed to be at least 40 years.
• Clock drift is not required to be at any level of accuracy, but ARM RECOMMENDS that drift be not greater than 10 seconds per 24 hours. The use of clock multiplication must not change the drift behaviour of the upcounter.
• The upcounter is architecturally specified to begin counting from 0 at #RESET.
• The upcounter must be implemented in the always-on power domain.

All agents (including devices in the system other than the host processors) reading the system upcounter must be presented with a uniform view of passing time.

The CNTFREQ register is only writeable by secure PL1 mode software, and must be initialized to state the frequency of the system upcounter. CNTFREQ is readable by PL2, secure and non-secure PL1 by default. CNTKCTL.PL0PCTEN enables CNTFREQ to be read from secure and non-secure PL0.

Timers

• The timers can be used as either count-up or count-down timers.
• The timers can operate in either physical or virtual time.
• The timers output signals can be configured as level-sensitive PPI IRQ signals to the GICC.