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SSE: Difference between revisions
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=== Checking for SSE ===
to check for SSE CPUID.01h:EDX.SSE[bit 25] needs to be set
<
mov eax, 0x1
cpuid
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jz .noSSE
;SSE is available
</syntaxhighlight>
=== Adding support ===
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Here is an asm example:
<
;now enable SSE and the like
mov eax, cr0
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mov cr4, eax
ret
</syntaxhighlight>
=== FXSAVE and FXRSTOR ===
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