Anonymous user
User:Seds: Difference between revisions
Jump to navigation
Jump to search
Add register list
(Created page with "{{Stub}} <div class="center" style="width: auto; margin-left: auto; margin-right: auto;">Warning: Many parts of RISC-V are not yet finally. Things might and will change! Look ...") |
(Add register list) |
||
Line 66:
Like RV64I but 128bit register length.
== Register set ==
RISC-V base ISA consists of 32 general purpose registers of size X bits, given X could be 32, 64 and 128-bits, depending on your base ISA.
{| class="wikitable"
|- style="font-weight:bold; text-align:center;"
! Register
! Calling convention
! Description
|-
| x0
| zero
| Hardwired to hold 0
|-
| x1
| ra
| Return address
|-
| x2
| sp
| Stack pointer
|-
| x3<br />
| gp
| Global pointer
|-
| x4
| tp
| Thread pointer
|-
| x5-x7
| t0-t2
| Temporary registers
|-
| x8
| s0/fp
| Saved register and/or frame pointer
|-
| x9
| s1
| Saved register
|-
| x10-x11
| a0-a1
| Function arguments and/or return values
|-
| x12-x17
| a2-a7
| Function arguments
|-
| x18-x27
| s2-s11
| Saved registers
|-
| x28-x31
| t3-t6
| Temporary registers
|-
| pc
| pc<br />
| Program counter
|}
== Extensions ==
| |||