User:Lionel/MSR Draft
Jump to navigation
Jump to search
A prototype of a list of MSR's, lifted straight from the manual.
MSR's
| MSR | Address | Vendor | Bit / Description | Comments. |
|---|---|---|---|---|
| IA32_P5_MC_ADDR (P5_MC_ADDR) | 0x0 | Intel | See Section 35.20 of Intel Architecture Manual 3c, “MSRs in Pentium Processors.” | Pentium Processor (05_01H) |
| IA32_APIC_BASE (APIC_BASE) | 0x1B | Intel / AMD | See Intel Architecture Manual 3c. | Intel Family 06 Model 1 and after support this. |
| IA32_FEATURE_CONTROL | 0x3A | Intel | Control Features in Intel 64 Processor (R/W) | If CPUID.01H: ECX[bit 5 or bit 6] = 1 |
| IA32_SAMPLE_AMD | 0xFF | AMD | N/A | N/A |
| IA32_SAMPLE_VIA | 0xFE | VIA | N/A | N/A |