Universal Serial Bus
The Universal Serial Bus was first introduced in 1994 with the intention of replacing various specialized interfaces, and to simplify the configuration of communication devices. The communication industry did not develop as the USB-IF foresaw, but the various transfer modes that USB introduced allowed it to become one of the most popular standards in use today. Virtually every modern computer supports USB.
Host Controllers
The Host Controller is the USB interface to the host computer system. In other words, the host controller is what the system software uses to communicate with USB devices.
USB 1.0 Host Controllers
Intel brought USB 1.0 to the market with its Universal Host Controller Interface (UHCI), while Compaq, Microsoft, and National Semiconductors did the same with their Open Host Controller Interface (OHCI). Naturally, the two interfaces are incompatible, and to make things worse, VIA Technologies licensed Intel's UHCI standard, thereby ensuring that both standards survived. Typically, an on-board chip set will contain a UHCI implementation, whereas a peripheral card typically implements the OHCI standard (but this is by no means a guarantee).
Specifications
- Universal Host Controller Interface (UHCI) Specifiations
- Open Host Controller Interface (OHCI) Specifications
USB 2.0 Host Controllers
In designing USB 2.0, the USB-IF insisted on a single implementation. That single implementation is Intel's Extended Host Controller Interface (EHCI). However, even though the USB 2.0 specification requires that a USB 2.0 interface support USB 1.0 devices, this doesn't mean that the EHCI must support USB 1.0 devices, and in fact, it doesn't. Each EHCI host controller is accompanied by (usually several) UHCI and/or OHCI host controllers. When a USB 1.0 device is attached, the EHCI simply hands control over to a companion controller. Refer to figure 1 for a simple block diagram implementation of this behavior. Therefore, the system programmer must support all three standards in order to support USB 2.0.
The EHCI host controller only handles USB 1.0 devices if they are attached indirectly through a USB 2.0 hub. The specifics of handling USB 1.0 devices attached to a USB 2.0 hub are briefly discussed and illustrated in hubs, and in more detail under Split Transactions
Specifications
USB 3.0 Host Controllers
In late 2008, the USB-IF released the USB 3.0 specifications. USB 3.0 host controllers are just starting to make their way into consumer devices since NEC introduced the world's first “SuperSpeed USB 3.0 host controller” in May, 2009, techspot reports.
Specifications
Supporting USB
Despite how attractive USB support is, the 650-page USB 2.0 specification manages to deter even some of the most driven hobbyists (especially if English isn't a his/her primary language). Not only is the USB 2.0 specification long, but it's a prerequisite for the EHCI, UHCI, and OHCI specifications, all of which must be implemented for full USB 2.0 support.
The truth is that you don't need to read the entire USB 2.0 specification; there are sections specific to hardware developers, for example. The information presented here attempts to summarize chapters 4, 5, and 8 through 11, but reading those sections of the specification is recommended.
On the other hand, the specifications were not written to simply take up space. The USB architecture is relatively extensive and can only be summarized so much. At the very least, the system programmer should keep a copy of the USB 2.0 specifications to reference when he/she is unsure about something. Hopefully the information here will also make the specifications easier to understand, as some terms can be confusing at first.
Fortunately, all of the necessary documentation is available or free:
Basic Concepts and Nomenclature
The USB is a polled bus, meaning the host controller must initiate all transfers. Do not mistake this to mean that the system software must poll the USB. The host controller takes care of polling the bus and can be programmed to issue interrupts to the OS whenever the bus needs attention.
USB System
A USB System consists of three discrete parts: the USB device(s), the USB interconnect, and the USB host. Figure 2 illustrates a USB System.
USB Device(s)
USB devices are classified as either a hub or a function (not to be confused with a program procedure). Hubs provide additional attachment points, whereas functions provide capabilities to the system. Some devices may implement several functions and an embedded hub in one physical package. These are called compound devices.
Functions
All functions understand the USB protocol, respond to standard operations (e.g, configuration or reset), and describe capabilities to the USB host.
There are three speed classes of functions:
- High-speed functions operate at up to 480 Mb/s.
- Full-speed functions operate at up to 12 Mb/s.
- Low-speed functions operate at up to 1.5 Mb/s.
The original USB specification defined low- and full-speed devices, while USB 2.0 added high-speed devices. USB 3.0 will add a fourth transfer speed of up to 5 Gb/s, called SuperSpeed.
Hubs
In a high-speed system, a high-speed hub plays a special role. Since the high-speed hub establishes a high-speed transfer rate with the host, it must isolate any full- or low-speed signaling from both the host and any attached high-speed devices.
To better understand, consider that the EHCI controller is accompanied by one or more companion controllers, as illustrated in figure 1 above. When a full- or low-speed device is attached directly to the root hub, the EHCI controller can relinquish ownership of that specific port to a companion controller as seen in figure 3. However, if a high-speed hub is connected to a port, as in Figure 4, then the EHCI controller must retain ownership of the port because it is a high-speed device. Now suppose other high-speed devices are attached to the high-speed hub in figure 4; obviously the EHCI controller retains control as in figure 5.
But what happens when a full- or low-speed device is connected to the high-speed hub in figure 5? If the EHCI controller were to relinquish ownership of the port, the high-speed devices will no longer be able to operate at high-speed, if at all, as in figure 6. Instead, the host controller and the hub support a special type of transaction called a split transaction. A split transaction involves only the host controller and a high-speed hub; it is transparent to any devices. This scheme of using split-transaction to support low- and full-speed devices on a high-speed hub is illustrated in figure 7.
USB Interconnect
The USB interconnect provides a connection from the USB device(s) to the USB host. Physically, the USB interconnect is a tiered star topology. A maximum of seven tiers are allowed, and the root hub occupies the first tier. Since compound devices contain an embedded hub, a compound device cannot be attached in tier 7. Figure 8 illustrates a USB topology (taken from Figure 4-1 of the USB 2.0 specifications).
USB Host
A USB system contains only one USB host. The host interfaces with the USB interconnect via a host controller. The host includes an embedded hub called the root hub which provides one or more attachment points, or ports.
USB Communication Flow
Figure 9 illustrates the concepts of USB communication flow and is taken from Figure 5-10 of the USB 2.0 Specifications.
Device Endpoints and Endpoint Numbers
Each USB device contains a collection of endpoints. Every endpoint has the following characteristics:
- Bus access frequency/latency requirement
- Bandwidth requirement
- A unique device-determined identifier called the endpoint number
- Error handling behavior requirements
- Maximum packet size the endpoint can send or receive
- The transfer type of the endpoint
- Device-determined direction of data transfer:
- Input: from the device to the host
- Output: from the host to the device
As an example, consider an “all-in-one” printer/scanner device. Such a device may implement an endpoint number for printing functionality, and a separate endpoint number for scanning functionality.
Although endpoints have a specific direction, two endpoints may have the same endpoint number but opposing data transfer directions. All functions implement two such endpoints with the endpoint number 0. Only endpoints with the endpoint number 0 may be accessed as soon as the device is powered and has received a bus reset; all other endpoints are in an undefined state until the device is configured.
Besides the two required endpoints, functions may implement additional endpoints as necessary, with the following limitations:
- Low-speed functions may implement up to two additional endpoints.
- Full- and high-speed devices may implement up to 15 additional input endpoints and 15 additional output endpoints. The reasons for this limit will be clear later on.
Endpoint Zero
All USB devices implement input and output endpoints with an endpoint number of 0. These endpoints are collectively known as the default control pipe. Endpoints with an endpoint number 0 are special in that they are accessible whenever the device is attached, powered and has received a bus reset.
In the interest of backwards compatibility, all high-speed functions must support these endpoints even when connected to a hub operating at full-speed. This means that high-speed devices must be able to reset at full-speed, as well as respond successfully to standard requests at full-speed. The high-speed device is not, however, required to support its intended functionality at full-speed. This allows USB 1.0 systems to identify a USB 2.0 device and alert the user if the device cannot function properly at full-speed
Pipes
A pipe associates software on the host (specifically, a buffer on the host) with an endpoint on a device.
There are two kinds of pipe communication modes:
- Stream pipes impose no structure on the data being transferred. Stream pipes are always uni-directional in their communication flow.
- Message pipes impose some structure on the data being transfered. Message pipes are bi-directional, however data may predominantly transfer in one direction.
Pipes also have the following attributes:
- A claim on bus access and bandwidth usage
- A transfer type
- The associated endpoint's characteristics
Data flow in one pipe is independent of data flow in any other pipe. Most pipes are available after a device has been configured, however the default control pipe always exists after a USB device is powered and has received a bus reset.
Default Control Pipe
The default control pipe is a special type of message pipe that is always accessible once a device is powered and has received a bus reset. Thus, the default control pipe provides a means to identify and configure devices so that additional endpoints, if any, are made available.
The information required to completely identify a device is associated with the default control pipe; such information falls into the following categories:
- Standard information is common among all USB devices.
- Class information depends on the class of the USB device, as identified by the standard information.
- USB Vendor information is free for use by the hardware vendor.
Basics of USB Transfers
Most USB transactions consist of three packets:
- A token packet indicates the type and direction of the transaction, the device address, and an endpoint number.
- Depending on the direction of the transaction, either the host or the function sends a data packet (which may simply indicate that there is no data to send).
- The receiving device responds with a handshake packet to indicate if the transfer was successful.
USB supports four basic types of data transfer which take place via pipes. A single pipe supports only (and exactly) one transfer type for any given device configuration. That is, a function may provide a means to change the transfer type of a device-implemented endpoint number.
Briefly, the four basic transfer types are:
- Control Transfers provide lossless transmissions and are used to configure a device. Thus, all USB devices must support control transfers at least via the default control pipe.
- Bulk Data Transfers provide lossless, sequential transmissions and are typically used to transfer large amounts of data.
- Interrupt Data Transfers provide reliable, limited-latency transmissions typically needed by human input devices such as a mouse or a joystick.
- Isochronous Data Transfers, also called Streaming Real-time Transfers, negotiate a required bandwidth and latency when initializing the transfer. This transfer type is predominantly used for such applications as streaming audio. Since data-delivery rate is considered more important than data integrity for this type of transfer, it does not provide any type of error checking or correction mechanism.
Control Transfers
Control transfers support configuration/command/status type communication flow. The host initiates a control transfer with a SETUP bus transaction to the function, which establishes details of the intended data transfer such as whether the host wishes to send or receive data. Next, zero or more DATA transactions take place in the appropriate direction. Finally, a STATUS transaction from the function to the host indicates whether the transfer was successful.
Clearly, control transfers adhere to a USB-defined structure, so it should come as no surprise that control transfers may only be carried out via messages pipes.
Neither a function nor the host are guaranteed any specific latency or bandwidth for control transfers.
Maximum Data Payload Size
An endpoint used for a control transfer specifies the maximum data payload size that it can accept or transmit to the bus. The allowable maximum data payload sizes depend on the speed of the device:
- High-speed device endpoints may only select a maximum data payload size of 64 bytes.
- Full-speed device endpoints may select a maximum data payload size of 8, 16, 32, or 64 bytes.
- Low-speed device endpoints may only select a maximum data payload size of 8 bytes.
A control transfer always uses it's maximum data payload size for data payloads unless the data payload is less than the maximum data payload size. That is, if an endpoint has a maximum data payload size of 64 bytes, and a control transfer intends to transmit 100 bytes, the first data payload must contain 64 bytes and no less. The remaining 36 bytes are transferred in the second payload and need not be padded to 64 bytes. When the host receives a data payload less than the maximum data payload, the host may consider the transfer complete.
A SETUP packet is always 8 bytes and thus receivable by the endpoint of any USB device. Consequently, the host may query the appropriate descriptor from a newly-attached full-speed device during configuration in order to determine the maximum data payload size for any endpoint; the host can then adhere to that maximum for any future transmissions.
Transmission Errors
Too Much Data
When transferring from host to device, if the host sends more data than negotiated during the SETUP transaction (i.e., the device receives more data than it expects; specifically, the host does not advance to the STATUS stage when the device expects), the device endpoint halts the pipe.
When transferring from device to host, if the device sends more data than negotiated during the SETUP transaction (i.e., the host receives an extra data payload, or the final data payload is larger than it should be), the host considers it an error and aborts the transfer.
Bus Errors
In the event of a bus error or anomaly, an endpoint may receive a SETUP packet in the middle of a control transfer. In such a case, the endpoint must abort the current transfer and handle the unexpected SETUP packet. This behavior should be completely transparent to the host; the host should neither expect nor take advantage of this behavior.
Halt Conditions
A control endpoint may recover from a halt condition upon receiving a SETUP packet. If the endpoint does not recover from a SETUP packet, it may need to be recovered via a different pipe. If an endpoint with the endpoint number 0 does not recover with a SETUP packet, the host should issue a device reset.
Bulk Data Transfers
A pipe with a bulk transfer type provides:
- Access to the USB on a bandwidth-available basis
- Retry of transfers that encounter the occasional delivery failure
- Guaranteed data integrity, but no guaranteed bandwidth
The host controller gives bulk data transfers low priority; they are generally only processed when bandwidth is available, however software may not assume that a control transfer will be processed before a bulk transfer. If multiple bulk transfers are pending, the host controller may begin moving bulk transfers over the bus according to an implementation-dependent policy. The system software may vary the bus time made available for a bulk transfer to a specific endpoint.
The USB does not impose any structure on the data content of a bulk transfer; thus, bulk transfers are carried via stream pipes.
Maximum Data Payload Size
An endpoint used for a bulk data transfer specifies the maximum data payload size that it can accept or transmit to the bus. The allowable maximum data payload sizes depend on the speed of the device:
- High-sped device endpoints may only select a maximum data payload size of 512 bytes.
- Full-speed device endpoints may select a maximum data payload size of 8, 16, 32, or 64 bytes.
- Low-speed devices may not implement bulk endpoints.
Like control transfers, a bulk transfer endpoint must transmit data payloads of the maximum data payload size for that endpoint with the exception of the last data payload in a particular transfer. The last data payload need not (and should not) be padded out to the maximum data payload size.
The bulk transfer is considered complete when the endpoint has transferred exactly as much data as expected, the endpoint transfers a packet with a data payload size less than the endpoint's maximum data payload size, or the endpoint transfers a zero-length packet.
Transmission Errors
If a data payload is transferred that is larger than expected, the transfer should be aborted along with any pending bulk transfers through the same pipe.
Bulk data transfers employ data toggle bits to both detect errors and provide the necessary synchronization to recover from an error. If a halt condition is detected, any remaining bulk transfers should be retired. The halt condition is resolved by means of a separate control pipe.
Interrupt Data Transfers
Interrupt data transfers guarantee a maximum service time for any data transfer. In the even of a transmission failure, data is retransmitted at the next period. Thus, an interrupt data transfer is ideal for devices that do not send data often, but when they do, they require timely transmission as well as data integrity; most human input devices have these requirements.
Interrupt data transfers are carried out by a stream pipe and thus do not need to adhere to any USB data structure.
Maximum Data Payload Size
An endpoint used for a interrupt data transfer specifies the maximum data payload size that it can accept or transmit to the bus. The allowable maximum data payload sizes depend on the speed of the device:
- High-speed device endpoints may select a maximum data payload size of up to 1024 bytes.
- Full-speed device endpoints may select a maximum data payload size of up to 64 bytes.
- Low-speed device endpoints may select a maximum data payload size of up to 8 bytes.
Additionally, a high-speed, high-bandwidth endpoint may specify that it requires two or three transactions per microframe. High-speed, high-bandwidth endpoints, frames, and microframes will be discussed later.
Notice that the maximum data payload size for interrupt data transfers allows for more granularity than control or bulk data transfers. That is, an interrupt data transfer endpoint for a high-speed device may be any integer from 0 to 1024. The maximum data payload size for an interrupt transfer endpoint remains constant during the lifetime of the device's configuration.
Like control and bulk data transfers, an interrupt transfer endpoint must transmit data payloads of the maximum data payload size for that endpoint with the exception of the last data payload in a particular transfer. The last data payload need not (and should not) be padded out to the maximum data payload size.
The interrupt transfer is considered complete when the endpoint has transferred exactly as much data as expected, the endpoint transfers a packet with a data payload size less than the endpoint's maximum data payload size, or the endpoint transfers a zero-length packet.
Transmission Errors
If a data payload is transferred that is larger than expected, the transfer should be aborted and the pipe stalls any future interrupt transfers until the error is acknowledged and corrected.
Interrupt data transfers may use one of two data toggle bit schemes to ensure successful data transmission. Devices that require higher through-put may choose to toggle every transmission rather than perform a handshake with the host. This method is more susceptible to errors than the alternative method of toggling bits upon successful transaction (after a handshake).
If a halt condition is detected, any pending interrupt transfers should be retired. The halt condition is resolved via a separate control pipe.
Isochronous Data Transfers
Isochronous data transfers are similar to interrupt transfers in that they guarantee a maximum service time for any transfer, but isochronous data transfers do not ensure data integrity. When data is ready to be transmitted to or from an isochronous endpoint, the data is always transferred at a constant rate.
The data being transmitted via an isochronous pipe need not have any specific structure, therefore isochronous pipes are stream pipes.
Maximum Data Payload Size
An endpoint used for a isochronous data transfer specifies the maximum data payload size that it can accept or transmit to the bus. The allowable maximum data payload sizes depend on the speed of the device:
- High-speed device endpoints may select a maximum data payload size of up to 1024 bytes.
- Full-speed device endpoints may select a maximum data payload size of up to 1023 bytes.
- Low-speed devices may not implement isochronous endpoints.
Like interrupt endpoints, isochronous endpoints may specify a maximum data payload size with byte granularity. Also like interrupt endpoints, high-speed, high-bandwidth isochronous endpoints may specify if they require two or three transactions per microframe.
Unlike any other transfer types, isochronous transfers may transmit any amount of data up to the maximum data payload size during any transaction.
Transmission Errors
Isochronous transfers are meant for devices where data transmission rate is more important than data integrity. For that reason, isochronous transfers do not allow handshakes and thus cannot stall. It is still important that the agent of an isochronous transfer know if an error occurred, and possibly how much data was lost. The USB protocol provides several mechanisms for detecting data transmission errors in an isochronous transfer, these mechanisms will be discussed later. Determining the amount of data lost is implementation-dependent. It is up to the software on the host or firmware on the function to implement any sort of data corruption detection/correction.
Advanced USB Concepts
The topics in this section build upon the topics previously discussed. The information in this section provides some useful lower-level details about USB systems.
Distribution of Bus Access Time
Frames and Microframes
To ensure synchronization between the host and the functions, the USB divides bus time into fixed-length segments. For low- or full-speed buses, the USB divides the bus time into 1 millisecond units, called frames. For a high-speed bus, the USB divides the bus time into 125 microsecond units, called microframes.
Note that frames and microframes do not coexist on one bus; low- and full-speed buses used frames, but in developing a high-speed bus, a shorter frame was necessary because the significantly higher signaling bit rate is more sensitive to smaller shifts in synchronization between the host and the function.
Frames and microframes are mostly a physical-layer detail and should not be confused with any of the previous concepts. Frames and microframes do not correspond to any packet or transaction; in fact, several transactions usually take place during one (micro)frame. The host controller issues a start-of-frame (SOF) packet at the beginning of every (micro)frame. The remainder of the (micro)frame is available for the host controller to carry out transactions. A transaction may not take place if it cannot be completed in the same (micro)frame (because otherwise the next SOF packet would interrupt the transaction).
It is important to realize that the host controller may rearrange transactions to make better use of the available bandwidth. Of course, two transactions through the same pipe must occur in the correct order, but the host controller may, for example, schedule the SETUP transaction for a control transfer, followed by the SETUP transaction of a separate control transfer, especially if the DATA transaction for the first control transfer would not fit in the remaining time of the particular (micro)frame.
Bus Time Rationing
There are separate rules for the allocation of frames on a full- or low-speed bus, and the rules for allocation of microframes on a high-speed bus.
For full- or low- speed buses:
- If a control transfer requires less than 10% of a frame, the remaining bus time can be used to support bulk transfers
- If there are more control transfers than reserved time, yet additional frame time that is unused by interrupt or isochronous transfers, the host controller may move additional control transfers onto the bus.
- No more than 90% of a frame may be allocated for periodic (isochronous and interrupt) transfers.
- The host must not issue more than 1 transaction in a single frame for a specific isochronous endpoint.
For a high-speed bus:
- If a control transfer requires less than 20% of a microframe, the remaining bus time can be used to support bulk transfers.
- If there are more control transfers than reserved time, yet additional microframe time that is unused by interrupt or isochronous transfers, the host controller may move additional control transfers onto the bus.
- No more than 80% of a frame may be allocated for periodic (isochronous and interrupt) transfers.
- The host must not issue more than 1 transaction in a single microframe for a specific isochronous endpoint unless it is a high-speed, high-bandwidth endpoint.
- Split transaction bus access time is allocated from the 80% of the microframe guaranteed to periodic transfers.
High-Speed, High-Bandwidth Endpoints
High-speed interrupt or isochronous endpoints that require high bandwidth may specify that they support up to three transaction in a single (micro)frame. In this case, all but the last transaction in a particular (micro)frame must have a data payload of the maximum data payload size for that endpoint.
The host controller never retries a transaction with an isochronous endpoint. If a transaction with a high-speed, high-bandwidth interrupt endpoint fails, the host controller may retry the transaction during the same (micro)frame if the maximum number of transactions per (micro)frame has not been reached. Otherwise, the transaction is retried at the next period.
Supporting Isochronous Transfers
Recall that isochronous transfers occur over stream pipes, which provide one-way data transfer. On one of the pipe, called the source, data is produced, and on the other end, called the sink, data is delivered.
Devices that implement isochronous endpoints require that data be transmitted from source to sink at a certain rate, sometimes in large payloads (e.g, streaming audio or video). This section discusses how the USB accomplishes these requirements.
Synchronization
Due to application-specific sampling rates, different hardware clock designs, scheduling policies in the operating system, or even physical anomalies, the host and isochronous device could fall out of synchronization. Therefore, special consideration is required to maintain synchronization. Isochronous endpoints specify one of three synchronization types.
Asynchronous Endpoints
Asynchronous endpoints are incapable of synchronizing to SOF packet frequency (1ms periods for full-speed endpoints, 125 microsecond periods for high-speed endpoints). These endpoints have either:a set of one or more fixed data sampling rates, or a continuously programmable data rate. The device must report the programmability of an asynchronous endpoint in some manner (defined by the class of the device rather than by the USB specifications); if the data rate is programmable, then it must be set by the host during initialization of the isochronous endpoint.
Asynchronous source endpoints imply their data rate by the number of samples produced per (micro)frame. Asynchronous sink endpoints must provide explicit feedback to the source endpoint. When the source endpoint is the host, it is the responsibility of the device driver to process the explicit feedback properly. This feedback allows the host and device to make slight adjustments to the data rate in order to compensate for any clock drift.
Synchronous Endpoints
Synchronous endpoints must synchronize their data transmissions to the SOF packet frequency (1ms periods for full-speed endpoints, 125 microsecond periods for high-speed endpoints). These endpoints have either a set of one or more fixed data sampling rates, or a continuously programmable data rate. The device must report the programmability of a synchronous endpoint in some manner (defined by the class of the device rather than by the USB specifications); if the data rate is programmable, then it must be set by the host during initialization of the isochronous endpoint.
Adaptive Endpoints
Adaptive endpoints can source or sink data at any rate within their specified operating range. These endpoints may have an operating range that centers around a specific data rate, it may have a finite set of data rate ranges, or it may select between several programmable or auto-detecting data rates. The device must report the programmability of an adaptive endpoint in some manner (defined by the class of the device rather than by the USB specifications); unlike the previous synchronization types, adaptive endpoints may adjust it's instantaneous data rate during operation.
Adaptive sink endpoints provide explicit feedback to the source like asynchronous endpoints.
Handling Errors
Handshakes are not performed for isochronous transactions, therewith eliminating the bandwidth overhead of acknowledgment packets. Unlike other transfer types, the applications of isochronous endpoints are responsible for any error detection and handling. Although it may be more important to continue delivering streaming data rather than retransmit a missed data packet, applications of isochronous endpoints often still need to know that an error did occur in the stream.
The USB protocol highlights the following possible method for the host or a device to detect an error in an isochronous stream:
- Isochronous transactions use data PID sequencing (data bit toggling), an isochronous sink can determine that a data packet was missed when it receives an invalid data PID sequence.
- The host controller and device can both see SOF packets on the bus. If the SOF packet is issued for a (micro)frame that is expected to carry the periodic data of an isochronous endpoint, but the data is not transmitted, then the hardware can determine that a packet was missed.
- The protocol provides CRC protection to ensure that the data has not been corrupted.
- If an endpoint sees the token packet but does not see the associated data packet within a bus transaction timeout period, then the data packet failed to transfer.
Once an application is aware that there is an error in the stream, it is up to the application to determine the next course of action.
USB Protocol
Packets
The atomic unit of data transfer is a packet. A packet is a bundle of organized data which typically contains three elements:
- Control information (e.g. source, destination, length of data)
- User/Application-specific data
- Error detection and correction bits
SYNC Field
The SYNC field is omitted from packet diagrams in the USB specifications, and usually in other material on USB meant for programmers. Here I will briefly describe the semantics of the SYNC field simply because USB sources often reference the SYNC field which may confuse the reader. However, for clarity, the system programmer (and probably most USB device firmware developers as well) does not need to know about the SYNC field.
All USB packets start with a SYNC field which serves, unsurprisingly, as a synchronization mechanism between the receiver and the sender. The SYNC field consists of 6 or 30 alternating bits for low- and full-speed or high-speed buses, respectively. The last two bits of the SYNC field are equal (and low). High-speed hubs may drop up to 4 bits of the SYNC field, so a receiving device may not see the entire field, but the final two bits are all the device needs to identify exactly where the SYNC field ends, and useful data begins.
Packet Identifier Field
The Packet Identifier (PID) immediately follow the SYNC field. There are a total of 17 defined PIDs (included the PID of 0000b, which is reserved), therefore a PID requires 4 bits to encode. If errors on the bus alter the PID field (changing an OUT PID to an IN PID, for example), the result could be anything from unexpected behavior to massive data loss. Due to the importance of the PID integrity, the PID field is 8 bits wide. The last 4 bits simply compliment the first four bits, this provides a means to determine if an error on the bus has altered the PID field. The PID Field is illustrated below.
| PID0 | PID1 | PID2 | PID3 | PID0 | PID1 | PID2 | PID3 |
PID codes are categorized into 4 groups which share the same two least-significant bits. USB 2.0 defines the PIDs in the following table.
| PID Type | PID Name | PID [3:0] | Description |
|---|---|---|---|
| Token | OUT | 0001b | The packet describes a host-to-function transaction. |
| IN | 1001b | The packet describes a function-to-host transaction. | |
| SOF | 0101b | The packet marks the start of frame and specifies the frame number. | |
| SETUP | 1101b | Packet describes a SETUP transaction from the host to the function via a control pipe. | |
| Data | DATA0 | 0011b | This packet is an even data packet. |
| DATA1 | 1011b | This packet is an odd data packet | |
| DATA2 | 0111b | This packet is only used in high-speed, high-bandwidth isochronous transfers. | |
| MDATA | 1111b | This packet is only used in split transactions, or high-speed, high-bandwidth isochronous transfers. | |
| Handshake | ACK | 0010b | This packet acknowledges the successful receipt of a data packet. |
| NAK | 1010b | This packet indicates that data is not ready to be transmitted yet. | |
| STALL | 1110b | This packet indicates that the endpoint has halted, or a control pipe does not support a certain request. | |
| NYET | 0110b | The receiver has not yet responded, or the host should begin sending PING packets. | |
| Special | PRE | 1100b | This packet is a host-issued preamble for a split-transaction. |
| ERR | 1100b | This packet is a handshake response that a split transaction error occurred. Note that this PID is identical to the PID for a PRE packet. | |
| SPLIT | 1000b | This packet supports split transactions between the host and a high-speed hub. | |
| PING | 0100b | This packet is used for flow-control in high-speed control and bulk transfers. | |
| Reserved | 0000b | This is a reserved PID and must not be used. |
Address Fields
Address fields select a specific endpoint on a specific function. Naturally, two such fields are defined: an address field and an endpoint field. All devices must fully decode these fields; a mistmatch of either field (including an endpoint field which specifies an endpoint that have not been initialized) must be ignored.
Address Field
The address field is specified for the following PIDs:
- IN
- SETUP
- OUT
- PING
- SPLIT
The address field is 7 bits wide and illustrated below. Each possible value may only indicate a single function. Address zero is reserved as the default address and cannot be assigned to any function. All functions must respond to the default address upon reset and power-up until the host assigns the function a specific address. Therefore, one host controller can support up to 127 devices at one time.
| Addr0 | Addr1 | Addr2 | Addr3 | Addr4 | Addr5 | Addr6 |
Endpoint Field
The endpoint field is specified for the following PIDs:
- IN
- SETUP
- OUT
- PING
The endpoint field is 4 bits wide and illustrated below. All functions must support at least endpoint number 0 (the default control pipe). Low-speed functions may only implement 2 additional pipes, while full- and high-speed devices are only limited by the width of the endpoint field. In other words, the width of the endpoint field is the reason that full- and high-speed devices are limited to implementing up to 15 additional IN endpoints, and 15 additional OUT endpoints, as noted above under Device Endpoints and Endpoint Numbers.
| Endp0 | Endp1 | Endp2 | Endp3 |
Data Field
The data field may range from zero to 1,024 bytes and must be an integral number of bytes. Data bytes are sent least-significant-bit first.
Cyclic Redundancy Checks
Cyclic Redundancy Checks (CRC) protect all non-PID fields and provide 100% converage for all single- and double-bit errors. CRCs are provided for each token field as well as the data field. This provides a mechanism for the host or device to recognize and either correct or ignore corrupted fields or, in most cases, an entire corrupted packet.
Handshakes
Transaction types which support flow control return handshakes to indicate:
- Successful reception of data
- Command acceptance or rejection
- Flow control
- Halt conditions
Handshakes are always returned in the handshake phase of a transaction, but may also be returned in the data phase (in place of an expected data packet). To best understand a certain handshake response, it is useful to understand what each handshake packet type means, as well as the conditions under which each handshake response may be issued. This section is divided thusly.
Handshake Packets
All of the handshake packet types were listed previously and briefly in Packet Identifier Field. This section discusses those packet types in greater detail.
ACK
| May be issued by... | For these transactions |
|---|---|
| Host | IN |
| Function | OUT |
| SETUP | |
| PING |
An ACK handshake is issued to communicate that a data packet was successfully received without any bit stuffing or CRC errors over the data field, and the PID field was not corrupted.
ACK packets may be issued when the receiver's sequence bit matches the sequence bit of the received data packet (and the data can be accepted), but the an ACK packet may also be issued when the receiver's sequence bit does not match the sequence bit of the received data packet (and the data cannot be accepted). This may seem counterintuitive, but the reasoning will become clear in the sections discussing data toggling.
NAK
| May be issued by... | For these transactions |
|---|---|
| Function | IN |
| OUT | |
| PING |
The NAK handshake packet is generally used for flow control to indicate that a function is temporarily unable to transmit or receive data. The host never issues a NAK handshake packet to a device.
A function returns a NAK handshake packet to the host after an OUT transaction when the function is unable to receive data (usually because the function's internal buffer is currently full). This response is not an error, but instead indicates that the host should retry transmission later, allowing the function time to process the data currently in its buffer.
A function returns a NAK handshake packet to the host during the data phase of an IN transaction to indicate that the function does not have any data to transfer.
STALL
| May be issued by... | For these transactions |
|---|---|
| Function | IN |
| OUT | |
| PING |
A function uses the STALL handshake packet to indicate that it is unable to transmit or receive data. Besides the default control pipe, all of a function's endpoints are in an undefined state after the device issues a STALL handshake packet. The host must never issue a STALL handshake packet.
Typically, the STALL handshake indicates a functional stall. A functional stall occurs when the halt feature (which will be covered under "USB Framework") of an endpoint is set. In this circumstance, host intervention is required via the default control pipe to clear the halt feature of the halted endpoint.
Less often, the function returns a STALL handshake during a SETUP or DATA stage of a control transfer. This is called a protocol stall and is resolved when the host issues the next SETUP transaction.
| May be issued by... | For these transactions |
|---|---|
| Hub | SPLIT |
| Function | OUT |
NYET
The NYET packet may be issued by a function as part of the PING protocol.
Hubs may issue a NYET handshake packet in response to a split transaction that has not yet completed on the low-/full-speed bus.
| May be issued by... | For these transactions |
|---|---|
| Hub | SPLIT |
ERR
Hubs may issue the special ERR handshake packet to report an error on a low-/full-speed bus as part of the split transaction protocol.
Function/Host Response Circumstances
This section describes the functional circumstances that cause the host or a function to issue an expected response, no response, or certain handshake packet responses. The tables in this section are taken and slightly modified for clarity from the USB 2.0 Specifications, section 8.4.6. Dashes denote a "don't care."
Function Response to IN Transactions
| Token received corrupted | Function Tx endpoint halt feature | Function can transmit data | Action taken by function |
|---|---|---|---|
| Yes | - | - | Return no response |
| No | Set | - | Issue STALL handshake |
| No | Not Set | No | Issue NAK handshake |
| No | Not Set | Yes | Issue data packet |
Host Response to IN Transactions
| Data packet corrupted | Host can accept data | Action taken by host | Handshake returned by host |
|---|---|---|---|
| Yes | - | Discard Data | Return no response |
| No | No | Discard Data | Return no response |
| No | Yes | Accept Data | Issue ACK handshake |
Function Response to OUT Transactions
| Data packet corrupted | Receiver halt feature | Sequence bits match | Function can accept data | Action taken by function |
|---|---|---|---|---|
| Yes | - | - | - | Return no response |
| No | Set | - | - | Issue STALL handshake |
| No | Not Set | No | - | Issue ACK handshake |
| No | Not Set | Yes | Yes | Issue ACK handshake |
| No | Not Set | Yes | No | Issue NAK handshake |
Function Response to SETUP Transactions
A function must always accept data in a SETUP transaction, and must never issue a STALL or NAK handshake in response. All non-control endpoints must simply ignore any SETUP transaction addressed to that endpoint. This allows SETUP transactions to function as a (re)synchronization mechanism between the host and a function's control endpoint.
PING Transaction Protocol
Consider a USB mass storage device. During a transfer from the host to the function, the function's buffer fills up with data that is pending being committed to the physical media. When the function's buffer is full, the function cannot accept new data until some of the buffer is committed, so if the host continues sending OUT transactions, the function must NAK them.
The problem with this OUT/NAK model is that a function must wait for the handshake stage of the OUT transaction before responding with a NAK. Since the handshake stage occurs after the data stage, this can waste a significant amount of bandwidth. Low- and full-speed buses suffer from this problem, but the USB 2.0 specification introduced the PING transaction protocol for high-speed buses.
The PING transaction protocol is very straightforward. Rather than an OUT transaction, the host issues a PING transaction to the function when the host wishes to send data. The function responds with either NAK to indicate that it is not ready to receive data (specifically, the function's buffer cannot accommodate the endpoint's maximum data payload amount of data), or ACK to indicate that the host may start sending data.
The USB 2.0 framework allows endpoints to specify an interval, in terms of microframes, which is the amount of micorframes that the host should wait before issuing another PING packet to the endpoint. However, the host is not required to wait this interval before issuing the next PING packet.
During a high-speed control or bulk transfer from the host to function, when an OUT transactions causes a function's free buffer space to drop below the endpoint's maximum data payload, the function responds with a NYET handshake packet. This indicates that the host should start issuing PING packets rather than additional OUT transactions.
TODO
Currently the above article is missing the following topics:
- Basic USB Protocol Information
- Data Toggling
- USB Framework
- Device States
- Standard requests and descriptors
- Typical organization of system software
- Hubs (including Split Transactions)
Original USB Wiki Content
Until the above sections are complete, the original content of this wiki entry that has not been covered in more depth is placed here.
USB keyboards/mice
Keyboards and mice are what the USB standard calls HID (Human Interface Device) class devices, and follow a special superset of the USB standard. Once you have a driver for a HID device, all USB HID devices will work with it, including mice, keyboards, joysticks, game controllers, and so forth. The HID standard is built on top of lower-level USB API's to send and receive data packets across the wire, but provides a translation layer that interprets the USB data so that the HID layer could conceivably be implemented on top of other protocols (Like PS/2 or serial).
For early stages, you can probably ignore the fact that those devices are USB. Virtually every chipsets will offer a good old PS/2 emulation of the USB human interface devices, so you can use I/O port 0x60 like the rest of us ...
Booting off of a USB flash disk
If the BIOS supports it is it as simple as selecting USB-FDD in the boot order and putting a simple bootloader (grub might do, I rolled my own) into the first 512 bytes of the device. The BIOS will handle all the fancy PCI / USB stuff via int 0x13. Note that there is no need for any specific filesystem or partitions (which means you can just "dd" a 2.2 linux kernel (which used to contain a simple floppy loader) to /dev/sda and it will easily come up).
Adding USB support
As a first step, you'll need to provide a driver for the USB Host Controller, which appears in most cases as a PCI device and will allow you to enumerate devices on the USB bus and send packets to the identified devices. Documentation about the Open Host Controller Interface, Universal Host Controller Interface and Extended Host Controller Interface are available freely. Your USB-aware chipset should support one of these three.
Once you know what devices are present, you'll have to identify a device-specific driver that will match that hardware. For some devices (webcams, scanners, etc), this may require a vendor-specific driver while other devices (USB keychains, HID etc) have to adhere to _class_ standards. This means that one can write a generic USB storage driver that will work with all possible keychains, embedded mp3 players, flash card readers, etc.
Don't forget that USB devices are hot-pluggable, that is they can be added and removed at any time while the system is running.
Brief Sequence of Operation
Note: This is taken from this thread and may be inaccurate. It needs adding to at any rate.
Setup
- 1) Find Host Controller Type, Info and IO address using the PCI bus
- 2) Reset Host
- 3) Reset Port
- 4) Check Port status to detect for device insertion
- 5) Enable Port.
Device Interaction
- 1) Get Device Descriptor of device
- 2) Get Config Descriptor of device
- 3) Set Address of device
- 4) Set Configuration of device
Sending Commands
Sending commands is protocol specific, this is dependant on the Device Type (OHCI, UHCI and EHCI - UHCI being the easiest).
The command is send in a similar manner to the Device Interaction section:
- 1) Setup Queue Heads linked list
- 2) Setup Transfer Descriptors linked list
- 3) Populate both lists with valid data
- 4) Inform USB Host Controller to start command transaction
For Mass Storage Devices you must send specific commands using the CBW and CBS structures. You will also have to implement the following SCSI commands:
Inquiry, Get_Capacity and Read_10 or Write_10
Configuration
The configuration part of the USB standard occurs through the notion of descriptors. Descriptors are blocks of information retrieved through the host controller which defines things like vendor/product identifiers for each device and class/subclass/protocol codes for each device's interface. Based on these informations, the Operating System can assign the proper driver to each device/interface.
A list of structures defining USB descriptors is available in usbdescr.h from Clicker's CVS (LGPL)
Reading descriptors
The host has to explicitly request descriptors from the device before it manipulates them. This is achieved by a setup transfer using a GET_DESCRIPTOR as the host->device data and receiving the descriptor as the data from the host. The whole transfer will look like
- command transaction:
Setup_TOKEN(addr=device, endpoint=0) : host -> device
DATA[ RequestType=0x80, Request=0x06, value=DESCR_TYPE|DESCR_SELECTOR,
index=0, length=wished_length] : h->d, 8 bytes
ACK : host <- device
- response transaction:
IN_TOKEN(addr=device, endpoint=0) : host -> device DATA(the_descriptor) : host <- device (as much bytes as requested) ACK : host -> device
- confirm transaction:
OUT_TOKEN(addr=device, endpoint=0) : host -> device DATA() : host -> device (empty) ACK : host <- device
The DATA packet in the command transaction is called the "Setup Packet" (according to Beyond Logic), and carries almost all of the 'interesting' stuff:
- the RequestType of 0x80 (DeviceToHost=0x80| StandardRequest=0| DeviceTargetted=0)
- the Request (command) 0x06 for "GET_DESCRIPTOR"
- the value (encoding unknown atm)
See Also
Links
- USB.org
- The USB 2.0 Specification. Here you can download the official Universal Serial Bus Revision 2.0 specification, which defines the hardware and software. This is by far the best place to start, although not a light reading.
- information about the HID standard.
- The Linux kernel (though things tends to be confusing there, and you have to be careful with educating yourself from Linux sources if your project isn't GPL'ed).
- In Intel chipsets manuals.
- USB in a Nutshell may also interest you. It looks like a really good tutorial giving all the required knowledge to understand any other USB documentation/source code in a couple of HTML pages ...
- any link to a description of USBstorage, USBprinter, HID, USB vendor list, etc. is of course welcome ;)
Forum Topics
- USB stick - discusses the feasability of booting from an USB memory stick
- USB driver - suggests a few startup links about USB
- support USB keyboard explained by Schol-R-Lea
- Collecting links about USB - PypeClicker and Df's collection of links about USB