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In order to see what your OS needs to support, you need to read the lower 32-bits of IA32_VMX_CR0_FIXED0 and IA32_VMX_CR4_FIXED0. The bits in those MSR's are what need to be set (and supported) in their corresponding control registers (CR0/CR4). If any of those bits are not enabled, a GPF will occur. Also, to see what extra bits can be set, check the IA32_VMX_CR0_FIXED1 and IA32_VMX_CR4_FIXED1. It's basically a mask of bits, if a bit is set to 1, then it "can" be enabled, but if it's a 0, you may generate an exception if you enable the corresponding bit in the control registers.
 
From my own hardware and emulator (bochs), I've found that you will most likely need to enable these bits: CR0.NE, CR4.PAEVMXE, CR0.PG and CR0.PE. For 64-bit kernels, you need to have IA32_EFER.LMA set.
Yes, that means you need to support PAE-enabled paging and have those structures installed into CR3. For 64-bit kernels, you need to have IA32_EFER.LMA set.
 
=== Executing VMXON ===
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