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ATA/ATAPI using DMA: Difference between revisions
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Added an order of sending DMA commands
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For any error except a UDMA CRC error, it is recommended to do a Software Reset on the bus, in order to force all the devices to take the bus out of DMA mode.
==Standard Order of Sending Commands==
* Prepare a PRDT in system memory.
* Send the '''physical''' PRDT address to the Bus Master PRDT Register.
* Set the direction of the data transfer by setting the Read/Write bit in the Bus Master Command Register.
* Clear the Error and Interrupt bit in the Bus Master Status Register.
* Select the drive.
* Send the LBA and sector count to their respective ports.
* Send the DMA transfer command to the ATA controller.
* Set the Start/Stop bit on the Bus Master Command Register.
* When an interrupt arrives (after the transfer is complete), respond by resetting the Start/Stop bit.
* Read the controller and drive status to determine if the transfer completed successfully.
==Comments==
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