8259 PIC: Difference between revisions
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cleaned up the mess from MT
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(ported PIC topics, note: still needs work) |
(cleaned up the mess from MT) |
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Thus, in an AT, IRQ line 2 is used to signal the second chip... But to confuse things more, IRQ 9 is redirected to IRQ 2. So when you get an IRQ 9, the signal is redirected to IRQ 2.
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Each of the two PICs in modern systems have 8 inputs. When any of the inputs is raised, the PIC sets a bit internally telling one of the inputs needs servicing. It then checks wether that channel is masked or not, and wether theres an interrupt already pending.
If the channel is unmasked and theres no interrupt pending, the PIC will raise the interrupt line. On the slave, this feeds IRQ 2 to the master, and the master is connected to the processor interrupt line.
When the processor accepts the interrupt, the master checks which of the two PICs is responsible for answering, then either supplies the interrupt number to the processor, or asks the slave to do so. The PIC that answers looks up the "vector offset" variable stored internally and adds the input line to form the requested interrupt number. After that the processor will look up the interrupt address and act accordingly.
The default (BIOS-defined) vector offsets are 8 for Master PIC and 0x70 for Slave PIC:
* Master: IRQ 0..7 -> INT 8..0xF (vector offset = 0x08)
* Slave: IRQ 8..15 -> INT 0x70..0x77 (vector offset = 0x70)
These default values don't suit the needs of ProtectedMode programming: there's a collision between IRQs 0..7 (mapped to INT 8..0xF) and processor exceptions (INT 0..0x1F are reserved).▼
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It's thus recommended to change the PIC's offsets (also known as remapping the PIC) so that IRQs use non-reserved vectors. A common choice is to move them to the beginning of the available range (IRQs 0..0xF -> INT 0x20..0x2F). For that, we need to set Master's offset to 0x20 and Slave's to 0x28.
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''Note the presence of io_wait() calls, on older machines its necessary to give the PIC some time to react to commands as they might not be processed quickly''
[[Category:Interrupts]]
[[Category:Hardware]]
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