MMX: Difference between revisions

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=Overview=
MMX is a SIMD technology (single instruction, multiple data) introduced by Intel on January 8, 1997 with their P5 "Pentium" processor line named "Pentium with MMX Technology". It has been superseded by [[SSE]] and now [[AVX]].
 
===CPUIDTechnical bits=Details==
 
MMX is accessed using 8 CPU registers (MM0 to MM7). Each register is 64 bits wide and can be used to hold 64-bit integers or multiple smaller integers packed. One instruction can be applied to two 32-bit integers, four 16-bit integers, or 8 8-bit integers at once.
The bit for MMX can be found on CPUID page 1, in EDX bit 23.
 
==See AlsoDetection==
 
The bit for MMX can be found on CPUID page 1, in EDX bit 23.
 
=MMX in 2021=
*[[SSE]]
MMX is now an old technology that was left in the past in favour of the new technologies [[SSE]] and [[AVX]].
*[[FPU]]
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