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User:Greasemonkey/Intel GenX: Difference between revisions
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→Making the GTT behave: Blits, glorious blits! Don't care what direction! When I look at t-*ACK*
(GTT is working) |
(→Making the GTT behave: Blits, glorious blits! Don't care what direction! When I look at t-*ACK*) |
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===Finding GTTADR===
'''Gen4 only (NOT Gen4.5!)''': 32-bit address "GTTADR" at PCI B0:D2:F0:0x1C. ''(TODO: confirm)''
'''Gen4.5 and above''': 64-bit address "GTTMMADR" at PCI B0:D2:F0:0x18 , then add 2MB (0x200000). ''(TODO: confirm the "above" bit)''
tends to use GTTADR from PCI, which is the 32-bit address at PCI+0x1C.
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</pre>
===Memory-to-GPU blit (and vice versa)===
This is for a 32bpp blit.
blk_(width|height) denotes the size of the blit to perform.
(src|dest)_gtt are addresses that the GPU will feed through the Global GTT or PPGTT
(src|dest)_pitch are the image pitches in DWords.
You must ensure that the GTT has the correct paging type for the given GPU for each page that this will need to use. For Gen4, use 0 for stolen memory, and 3 for system memory.
<pre>
// SRC_COPY_BLT
genx_rb_push((2<<29) | (0x43<<22)
| (3<<20) // a:rgb mask
| 0x04
);
genx_rb_push(0
| (0<<30) // reverse X direction
| (3<<24) // bit depth
| (0xCC<<16) // raster op
| (dest_pitch*4) // dest pitch in bytes
);
genx_rb_push((blk_height<<16) | (blk_width*4)); // dest dims
genx_rb_push(dest_gtt);
genx_rb_push(0
| (src_pitch*4) // src pitch in bytes
);
genx_rb_push(src_gtt); // src addr
genx_rb_punch();
</pre>
==See Also==
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