Page history
10 June 2024
9 June 2024
6 June 2024
5 June 2024
osdev>Deblokc
→First In First Out Control Register: FCR is at offset +2 not +3
osdev>Deblokc
→Interrupt Identification Register: IIR is at offset +2 not +3
7 May 2024
osdev>Nicepotato
Naming consistency (cont.)
m+26
osdev>Nicepotato
Naming consistency
m+8
osdev>Nicepotato
Consistency
m−18
osdev>Nicepotato
Fix mistake in Interrupt State section and flip table for bits 2-1 and 7-6
mosdev>Nicepotato
Added First In / First Out Control Register and Interrupt Identification Register Sections (plus minor consistency edit)
+1,983
osdev>Nicepotato
Added a section for the Line Control Register along with a table for its bits. Also adjusted some section names regarding the LCR to all use "Bits" rather than inconsistent naming.
+264
1 September 2022
14 July 2022
27 February 2022
26 January 2022
28 December 2021
19 February 2021
22 December 2020
6 October 2019
5 October 2019
5 February 2019
9 January 2019
22 November 2017
4 June 2017
13 October 2016
7 September 2016
1 April 2016
28 January 2015
19 April 2014
22 January 2014
3 February 2012
5 December 2010
4 December 2010
2 December 2010
26 April 2010
14 October 2009
29 September 2009
Kenny
→Baud Rate: Added 0 divisor comment
m+267
Kenny
→Initialization
m+3
Kenny
→Stop bits
+74
Kenny
→Programming the Serial Communications Port
+4,585
Kenny
→Initialization
+612