PL050 PS/2 Controller

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Revision as of 04:39, 15 February 2019 by osdev>Andrewisoffline (Added the clock divisor register to its place before the interrupt register.)
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Another example is the ARM Integrator/CP board which implements the PS/2 interface encapsulated in the PL050 (where the PL050 is analogous to the I8042) except you communicate with the PL050 differently than the I8042. But, after the PL050 is configured you then proceed with the PS/2 mouse protocol. For example:

/*
	 KMI/PL050 bases under Integrator/CP compatible board.
*/
#define KMI_KB_BASE	            0x18000000	// keyboard
#define KMI_MS_BASE	            0x19000000	// mouse
typedef struct _KMI_MMIO {
	uint32		cr;		// control register (rw)
	uint32		stat;		// status register (r)
	uint32		data;		// data register (rw)
	uint32		clk;		// clock divisor register (rw)
	uint32		ir;		// interrupt control register (r)
} KMI_MMIO;

KMI_MMIO	volatile *mmio;
uint32       tmp;
mmio = (KMI_MMIO*)KMI_MS_BASE;
mmio->cr = 0x4;
/* talk to the PS2 controller and enable it */
mmio->data = 0xF4;
/* keyboard sends back ACK */
while(!KMI_TXFULL(mmio->stat));
tmp = mmio->data;

The above uses memory mapped input/output (MMIO), but other architectures may use I/O ports instead or a combination of I/O ports and MMIO for example the X84/64. So understanding your platform is very important to understand how to proceed in talking to the devices.

Above, the PL050 is also called the KMI (Keyboard And Mouse Interface). So first we have to configure the PL050 by enabling it. Now, it provides a interface to the PS2 interface which then interfaces with the mouse. So, the next thing I have to do is write the value 0xF4 which you can find in the table above to enable the mouse.


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