Open Host Controller Interface
The Open Host Controller Interface (OHCI) is an open standard that defines the interfaces between certain USB and Firewire drivers, hardware controllers, and devices. It was originally published by Compaq, Microsoft and National Semiconductor in 1999. Along with the Universal Host Controller Interface (UHCI), the OHCI makes up the USB 1.0 standard.
Technical Details
According to the OHCI standard, the OHCI driver communicates with the OHCI controller using two primary methods: Memory Mapped Registers, and Shared Memory Linked Lists.
The OHCI defines 21 memory mapped registers:
| Offset (Hex) | Name |
|---|---|
| 00 | HcRevision |
| 04 | HcControl |
| 08 | HcCommandStatus |
| 0c | HcInterruptStatus |
| 10 | HcInterruptEnable |
| 14 | HcInterruptDisable |
| 18 | HcHCCA |
| 1c | HcPeriodCurrentED |
| 20 | HcControlHeadED |
| 24 | HcControlCurrentED |
| 28 | HcBulkHeadED |
| 2c | HcBulkCurrentED |
| 30 | HcDoneHead |
| 34 | HcFmInterval |
| 38 | HcFmRemaining |
| 3c | HcFmNumber |
| 40 | HcPeriodicStart |
| 44 | HcLSThreshold |
| 48 | HcRhDescriptorA |
| 4c | HcRhDescriptorB |
| 50 | HcRhStatus |
In addition to these registers, starting at offset 54h, each USB port on the root hub is assigned an HcRhPortStatus register that denotes the current status of the port.
All commands and data packets are supplied to the controller via a shared memory area containing tables and linked lists. The USB protocol defines 4 different message types: Interrupt, Isochronous, Control and Bulk. Each message type is given its own linked list of outgoing messages. As the controller processes these messages, they are moved to a corresponding "done" list, along with information concerning any errors encountered by the controller while delivering the message.
PCI Configuration
The memory mapped registers listed above are not fixed in memory, and may be located at any 32-bit address regardless of how much memory is installed on the machine. To find the base register address, the PCI bus can be searched for a specific vendor/device id, or a specific Class ID to find any OHCI controllers. All OHCI controllers will have a Class ID of 0x0Ch, a subclass of 0x03h, and a program interface value of 0x10h. The PCI device configuration area contains a single Base Address that points to the memory mapped register block.