Model Specific Registers

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Revision as of 10:00, 29 March 2007 by osdev>Os64dev (fix cpuSetMST asm statement)
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Processors from P6 family (including Pentium PRO, Pentium 3 & 4) have a collection of registers that allows configuration of various things such as memory type-range, sysenter/sysexit, local APIC, etc.

Each MSR has a single 32-bit identification number that will be given to RDMSR or WRMSR assembly instructions to operate it. MSRs are 64-bit wide. The presence of MSRs on your processor is indicated by bit 5 of CPUID features.

boolean cpuHasMSR()
{
   dword a,d;
   cpuid(1,&a,&d);
   return d&CPUID_FLAG_MSR;
}

void cpuGetMSR(dword msr, dword *lo, dword *hi)
{
   asm volatile("rdsmr":"=a"(*lo),"=d"(*hi),"c"(msr));
}

void cpuSetMSR(dword msr, dword lo, dword hi)
{
   asm volatile("wrsmr"::"a"(lo),"d"(hi),"c"(msr));
}