Memory barriers

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Revision as of 20:49, 1 February 2009 by osdev>Berkus (New page: Memory barriers ensure ordering of load/store commands. Usually CPUs and compilers reorder these instructions for more efficient execution. Lock-free algorithms often require that perceiv...)
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Memory barriers ensure ordering of load/store commands.

Usually CPUs and compilers reorder these instructions for more efficient execution. Lock-free algorithms often require that perceived execution order be strict, that's when memory barriers or memory fences come in handy.

More detailed description in following articles:

Memory Ordering in Modern Microprocesors, Part 1 and Part 2

Ridiculous Fish's controversial article] about using and abusing memory barriers. (and bashing of this article just for a different POV)