Memory barriers: Difference between revisions
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(New page: Memory barriers ensure ordering of load/store commands. Usually CPUs and compilers reorder these instructions for more efficient execution. Lock-free algorithms often require that perceiv...) |
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Memory Ordering in Modern Microprocesors, [http://www.linuxjournal.com/article/8211 Part 1] and [http://www.linuxjournal.com/article/8212 Part 2] |
Memory Ordering in Modern Microprocesors, [http://www.linuxjournal.com/article/8211 Part 1] and [http://www.linuxjournal.com/article/8212 Part 2] |
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Ridiculous Fish's [http://ridiculousfish.com/blog/archives/2007/02/17/barrier/ controversial article |
Ridiculous Fish's [http://ridiculousfish.com/blog/archives/2007/02/17/barrier/ controversial article] about using and abusing memory barriers. (and [http://www.thinkingparallel.com/2007/02/19/please-dont-rely-on-memory-barriers-for-synchronization/some bashing of this article] just for a different POV) |
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Revision as of 20:50, 1 February 2009
Memory barriers ensure ordering of load/store commands.
Usually CPUs and compilers reorder these instructions for more efficient execution. Lock-free algorithms often require that perceived execution order be strict, that's when memory barriers or memory fences come in handy.
More detailed description in following articles:
Memory Ordering in Modern Microprocesors, Part 1 and Part 2
Ridiculous Fish's controversial article about using and abusing memory barriers. (and bashing of this article just for a different POV)