Interrupt Descriptor Table
This article needs to include information from the old OsFaq2-wiki: IDT.
The Interrupt Descriptor Table (IDT) is specific for the I386 architecture. It is the protected mode counterpart to the real mode Interrupt Vector Table (IVT) telling where the interrupt service routines (ISR) are located. It is similar to the Global Descriptor Table in structure.
The IDT entries are called gates. It can contain Interrupt Gates, Task Gates and Trap Gates.
Structure
The IDT is loaded using the LIDT assembly instruction. It expects the location of a IDT description structure:
Byte:
+---------------+---------------+
0 | Size |
+---------------+---------------+
+---------------+---------------+---------------+---------------+
2 | Offset |
+---------------+---------------+---------------+---------------+
The offset is the location of the table itself. The size is the size of the table subtracted by 1.
The table contain 8-byte entries. Each entry have a complex structure:
Byte:
+---------------+---------------+---------------+---------------+
0 | Offset 0:7 | Offset 8:15 | Selector 0:7 | Selector 7:15 |
+---------------+---------------+---------------+---------------+
+---------------+-----+---------+---------------+---------------+
4 |0 0 0 0 0 0 0 0|Flags|GateType | Offset 16:23 | Offset 24:31 |
+---------------+-----+---------+---------------+---------------+
What "Offset 0:7" means is that the byte contains bits 0-7 of the offset value. The offset is a 32 bit value. The selector is a 16 bit value and must point to a valid selector in your GDT. The Flags and GateType is specified here:
Flags: GateType:
(I386 Interrupt Gate) (I386 Task Gate) (I386 Trap Gate)
Bit: 7 . 5 4 . . . 0 4 . . . 0 4 . . . 0
+-------+ +-------------+ +-------------+ +-------------+
|Pr Priv| |0 1 1 1 0| |0 0 1 0 1| |0 1 1 1 1|
+-------+ +-------------+ +-------------+ +-------------+
The bit fields of Flags are:
- Pr: Present bit. This must be set to 1 for all valid gate descriptors.
- Priv: Privilege, 2 bits. Contains the ring level, 0 = highest (kernel), 3 = lowest (user applications).
I386 Interrupt Gate
The Interrupt Gate is used to specify a interrupt service routine. When you do INT 50 in assembly, running in protected mode, the CPU looks up the 50th entry (located at 50 * 8) in the IDT. Then the Interrupt Gates selector and offset value is loaded. The selector and offset is used to call the interrupt service routine. When the IRET instruction is read, it returns. If running in 32 bit mode and the specified selector is a 16 bit selector, then the CPU will go in 16 bit protected mode after calling the interrupt service routine. To return you need to do O32 IRET, else the CPU doesn't know that it should do a 32 bit return (reading 32 bit offset of the stack instead of 16 bit).
I386 Task Gate
In the Task Gate descriptor the offset value is not used. Just set it to 0.
- (Write about it...)
I386 Trap Gate
- (Write about it...)
See also
External references
