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It is traditional (and usually approved as a GoodThing) to have your kernel mapped in every user process. Linux, for instance (and many other unices) resides at virtual addresses 0xC0000000..0xffffffff of every address space, leaving the range 0x00000000..0xbfffffff for user code, data, stacks, libraries, etc. Kernels that have such design are said to be "in the higher half" by opposition to kernels that use lowest virtual addresses for themselves and leave higher addresses for the applications.
It is traditional and generally good to have your kernel mapped in every user process. Linux and many other Unices, for instance, reside at virtual addresses ''0xC0000000 – 0xFFFFFFFF'' of every address space, leaving the range ''0x00000000 – 0xBFFFFFFF'' for user code, data, stacks, libraries, etc. Kernels that have such design are said to be "in the higher half" by opposition to kernels that use lowest virtual addresses for themselves, and leave higher addresses for the applications.


In addition, there is some non-x86 ISA (the [[MIPS Overview|MIPS]] [[User:Schol-r-lea/Understanding RISC vs CISC|RISC architecture]] and [[AArch64|ARM]]) which partly forces the issue. On MIPS and ARM systems, addresses using the high bit (either bit 31 or bit 63, depending on the system word width) are reserved for use in Supervisor mode, and are exception trapped when in User mode.
⚫
Advantages of a HigherHalfKernel are:


⚫
Advantages of a higher half kernel are:
* Easier to set up VM86 processes since the region below 1MB is userspace.
* It's easier to set up [[Virtual 8086 Mode|VM86]] processes since the region below 1 MB is userspace.
* More generically, user applications are not dependent of how many memory is kernel space (your app can be linked for 0x400000 regardless of whether kernel is at 0xC0000000, 0x80000000 or 0xE0000000 ...), which makes ABIs nicer.
* More generally, user applications are not dependent on how much memory is kernel space (your application can be linked to 0x400000 regardless of whether kernel is at ''0xC0000000'', ''0x80000000'' or ''0xE0000000'' ...), which makes the ABI nicer.
* If your OS also supports 64-bits, 32-bit applications will be able to use the full 32-bit address space in the 64-bit version.
* If your OS is 64-bit, then 32-bit applications will be able to use the full 32-bit address space.
* 'mnemonic' invalid pointers such as 0xcafebabe, 0xdeadbeef, 0xdeadc0de, etc. can be used.
* 'Mnemonic' invalid pointers such as ''0xCAFEBABE'', ''0xDEADBEEF'', ''0xDEADC0DE'', etc. can be used.


== Bootloader support ==
⚫
Related thread: I wrote a simple HigherHalf kernel
To make things easier, some bootloaders natively support higher half kernels, by directly loading and mapping a kernel to the higher half in virtual memory.
How can i place my kernel in the higher half?


* [[BOOTBOOT]] only supports higher half kernels by design. It has example Hello World kernels written in [[C]], [[Pascal]], [[Rust]] and [[Go]]
⚫
It basically depends on when you'd like your kernel to believe it's in the higher end and when you set up paging.
* The [[Limine]] protocol also only support higher half kernels by design. See [[Limine Bare Bones]] for a tutorial on how to write a simple 64-bit higher half kernel using Limine.
With your own bootloader


== Initialization ==
The easiest way is to load your kernel to any physical location you wish (for instance in the lowest 1MB) and prepare page tables that will perform the appropriate translation. Let's say you loaded your kernel starting at 0x00010000 up to 0x0009ffff and want it to appear at 0xC0010000.
To setup a higher half kernel, you have to map your kernel to the appropriate virtual address. When using a boot protocol which supports higher half kernels directly, such as [[BOOTBOOT]], or [[Limine]], your kernel will already be properly mapped.


⚫
How to do this basically depends on '''when''' you'd like your kernel to believe it's in the higher end, and '''when''' you set up paging. Without a boot loader help, you'll need a small trampoline code which runs in lower half, sets up higher half paging and jumps.
1. Pick 3 4096-aligned addresses where you'll put your page directory and system tables. Wipe them (with zeroes).
2. Fill the lowest 256 entries of one table to set up IdentityPaging for at least the BIOS and your bootloader (I'd even use 1:1 mapping for the whole lowest 1MB if I were you :)).
3. In the other table, fill entry #0x10 with 0x00010003, entry #0x11 with 0x00011003 ... (for as much pages as your kernel has).
4. Fill the entry #0 of the directory with the address of the first table (and make it present).
5. Fill the entry #768 of the directory with the address of the second table (and make it present).


== See Also ==
When switching to ProtectedMode, use this AsmExample:


=== Articles ===
mov eax, physical_address_of_the_directory
* [[Higher Half x86 Bare Bones]]
mov cr3,eax
mov eax,cr0
or eax,0x80000001 ; enables both pmode and paging
mov cr0,eax


=== Threads ===
TimRobinson's GDT trick
⚫
* [[Topic:11160|I wrote a simple HigherHalf kernel]]


[[Category:Kernel]]
If we don't want to enable paging right from the start, it is still possible to have your kernel appearing in the higher half by using an appropriate base for the code and data segments. Say we have loaded the kernel at 0x10000 and we want it to appear at 0xC0000000. All we need is to find a base X such as _X_+0xC0000000 == 0x10000. The bootloader will then initialize the GDT with cs.base == 0x40010000 == ds.base. This also means that special care must be taken for vram access, as (void*)0xb8000 is now somewhere above 1GB. Either use a special 0-based additional data-segment or use

#define logical_to_physical(x) (((void*)x)+0x40010000)
#define physical_to_logical(x) (((void*)x)-0x40010000)

short* vram=physical_to_logical(0xb8000)

When you eventually enable paging, create the page tables as mentioned above (keeping in mind that you need to undo the address conversion again, e.g.

pgentry *pagedirectory=physical_to_logical(0x9D000);
pgentry *lowesttable=physical_to_logical(0x9C000);
pgentry *kerneltable=physical_to_logical(0x9B000);

// prepare lowesttable and kerneltable
pagedirectory[0]=mkpgentry(0x9C000,PG_PRESENT|whatever);
pagedirectory[0xC0000000>>12]=mkpgentry(0x9B000,PG_PRESENT|PG_SYSTEM|whatever);
set_cr3_and_update_gdt(0x9D000);

Along with setting CR3's value, you'll have to clear the base of all the previous segments and reload segment registers so that, at the exit of set_cr3_and_update_gdt, any memory references now use the 0-based code and data segment and that the page tables perform the translation required to still make 0x10000 appear at 0xC0000000.
With GRUB (if you want to set up paging right from the start)

GRUB will load your kernel at the desired physical target address, but it will leave segments in the GDT with a 0 base and it will not enable paging.
With GRUB (if you don't want to set up paging right from the start)

Even with GRUB it's still possible to use TimRobinson's GDT trick: just set up a "fake" GDT then jump to your C code and enable paging. See HigherHalfWithGdt
Do you have a Higher half BareBones somewhere?

Yes. Here it is: HigherHalfBareBones

Latest revision as of 12:03, 8 September 2022

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Kernel Designs
Models
Other Concepts

It is traditional and generally good to have your kernel mapped in every user process. Linux and many other Unices, for instance, reside at virtual addresses 0xC0000000 – 0xFFFFFFFF of every address space, leaving the range 0x00000000 – 0xBFFFFFFF for user code, data, stacks, libraries, etc. Kernels that have such design are said to be "in the higher half" by opposition to kernels that use lowest virtual addresses for themselves, and leave higher addresses for the applications.

In addition, there is some non-x86 ISA (the MIPS RISC architecture and ARM) which partly forces the issue. On MIPS and ARM systems, addresses using the high bit (either bit 31 or bit 63, depending on the system word width) are reserved for use in Supervisor mode, and are exception trapped when in User mode.

Advantages of a higher half kernel are:

  • It's easier to set up VM86 processes since the region below 1 MB is userspace.
  • More generally, user applications are not dependent on how much memory is kernel space (your application can be linked to 0x400000 regardless of whether kernel is at 0xC0000000, 0x80000000 or 0xE0000000 ...), which makes the ABI nicer.
  • If your OS is 64-bit, then 32-bit applications will be able to use the full 32-bit address space.
  • 'Mnemonic' invalid pointers such as 0xCAFEBABE, 0xDEADBEEF, 0xDEADC0DE, etc. can be used.

Bootloader support

To make things easier, some bootloaders natively support higher half kernels, by directly loading and mapping a kernel to the higher half in virtual memory.

  • BOOTBOOT only supports higher half kernels by design. It has example Hello World kernels written in C, Pascal, Rust and Go
  • The Limine protocol also only support higher half kernels by design. See Limine Bare Bones for a tutorial on how to write a simple 64-bit higher half kernel using Limine.

Initialization

To setup a higher half kernel, you have to map your kernel to the appropriate virtual address. When using a boot protocol which supports higher half kernels directly, such as BOOTBOOT, or Limine, your kernel will already be properly mapped.

How to do this basically depends on when you'd like your kernel to believe it's in the higher end, and when you set up paging. Without a boot loader help, you'll need a small trampoline code which runs in lower half, sets up higher half paging and jumps.

See Also

Articles

Threads

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