X86-64 Instruction Encoding: Difference between revisions

Jump to navigation Jump to search
[unchecked revision][unchecked revision]
← Older editNewer edit →
Content deleted Content added
VisualWikitext
→‎Registers: Added YMM registers
Line 293: Line 293:
+---+---+---+---+---+---+---+---+
+---+---+---+---+---+---+---+---+
</pre>
</pre>
{| {{wikitable}}
* MODRM.mod (2 bits)
! Field
* MODRM.reg (3 bits)
! Length
* MODRM.rm (3 bits)
! Description

|-
The ''MODRM.mod'' and ''MODRM.rm'' fields are explained in the table. The ''MODRM.reg'' field can have one of two values:
| MODRM.mod||2 bits||In general, when this field is b11, then register-direct addressing mode is used; otherwise register-indirect addressing mode is used.
⚫
* A 3-bit opcode extension, which is used by some instructions but has no futher meaning other than distincting the instruction from other instructions. When ''/0'' through ''/7'' is specified at the opcode syntax, use that value as the value for the ''MODRM.reg'' field.
|-
⚫
* A 3-bit register reference, which can be used as the source or the destination of an instruction (depending on the instruction). This is the case when ''/r'' is specified at the opcode syntax. Which register is meant depends on the [[#Operand-size and address-size override prefix|operand-size]] of the instruction and the instruction itself. See the ''Value'' column of the following table for the possible values of the ''MODRM.reg'' field:
| MODRM.reg||3 bits||This field can have one of two values:
⚫
* A 3-bit opcode extension, which is used by some instructions but has no further meaning other than distincting the instruction from other instructions. When ''/0'' through ''/7'' is specified at the opcode syntax, use that value as the value for the ''MODRM.reg'' field.
⚫
* A 3-bit register reference, which can be used as the source or the destination of an instruction (depending on the instruction). This is the case when ''/r'' is specified at the opcode syntax. Which register is meant depends on the [[#Operand-size and address-size override prefix|operand-size]] of the instruction and the instruction itself. See [[#Registers|Registers]] for the values to use for each of the registers. The REX.R, VEX.~R or XOP.~R field extends this field with 1 most-significant bit to 4 bits total.
|-
| MODRM.rm||3 bits||Specifies a direct or indirect register operand, optionally with a displacement. The REX.B, VEX.~B or XOP.~B field extends this field with 1 most-significant bit to 4 bits total.
|}


==== Registers ====
==== Registers ====
Retrieved from "https://osdev.wiki/wiki/X86-64_Instruction_Encoding"