X86-64 Instruction Encoding: Difference between revisions

Jump to navigation Jump to search
[unchecked revision][unchecked revision]
← Older editNewer edit →
Content deleted Content added
VisualWikitext
→‎64-bit SIB byte: New version
Line 642: Line 642:
<small id="Table6Note1">1: To encode ''disp32'' as in protected/compatibility mode, use the SIB byte.</small>
<small id="Table6Note1">1: To encode ''disp32'' as in protected/compatibility mode, use the SIB byte.</small>


==== 64-bit SIB byte ====
==== SIB byte ====
The meaning of the SIB byte while using 64-bit addressing is as follows. The ModR/M byte's ''mod'' field and the SIB byte's ''index'' field and ''REX.X'' bit (denoted as ''X'') are used vertically, the SIB byte's ''base'' field and ''REX.B'' bit horizontally. The ''s'' is the [[#SIBScale|scaling factor]].
The meaning of the SIB byte in 32-bit or 64-bit addressing is as follows. The ''MODRM.mod'' field, the ''SIB.index'' field and ''REX.X''/''VEX.~X''/''XOP.~X'' bits (denoted as ''X'') are used vertically, the ''SIB.base'' field and ''REX.B''/''VEX.~B''/''XOP.~B'' bits (denoted as ''B'') horizontally. The ''s'' is the [[#SIBScale|scaling factor]].


<div style="font-size: 70%">
<div style="font-size: 70%">
{| {{wikitable}}
{| {{wikitable}}
! !! !! !! colspan="8" | REX.B = 0
! !! !! !! colspan="8" | B = 0
|-
|-
! Mod
! Mod
Line 662: Line 662:
|-
|-
! rowspan="16" | b00 !! 0 !! b000
! rowspan="16" | b00 !! 0 !! b000
|[RAX] + ([RAX] * s)||[RCX] + ([RAX] * s)||[RDX] + ([RAX] * s)||[RBX] + ([RAX] * s)||[RSP] + ([RAX] * s)||([RAX] * s) + disp32||[RSI] + ([RAX] * s)||[RDI] + ([RAX] * s)
|[_AX] + ([_AX] * s)||[_CX] + ([_AX] * s)||[_DX] + ([_AX] * s)||[_BX] + ([_AX] * s)||[_SP] + ([_AX] * s)||([_AX] * s) + disp32||[_SI] + ([_AX] * s)||[_DI] + ([_AX] * s)
|-
|-
! 0 !! b001
! 0 !! b001
|[RAX] + ([RCX] * s)||[RCX] + ([RCX] * s)||[RDX] + ([RCX] * s)||[RBX] + ([RCX] * s)||[RSP] + ([RCX] * s)||([RCX] * s) + disp32||[RSI] + ([RCX] * s)||[RDI] + ([RCX] * s)
|[_AX] + ([_CX] * s)||[_CX] + ([_CX] * s)||[_DX] + ([_CX] * s)||[_BX] + ([_CX] * s)||[_SP] + ([_CX] * s)||([_CX] * s) + disp32||[_SI] + ([_CX] * s)||[_DI] + ([_CX] * s)
|-
|-
! 0 !! b010
! 0 !! b010
|[RAX] + ([RDX] * s)||[RCX] + ([RDX] * s)||[RDX] + ([RDX] * s)||[RBX] + ([RDX] * s)||[RSP] + ([RDX] * s)||([RDX] * s) + disp32||[RSI] + ([RDX] * s)||[RDI] + ([RDX] * s)
|[_AX] + ([_DX] * s)||[_CX] + ([_DX] * s)||[_DX] + ([_DX] * s)||[_BX] + ([_DX] * s)||[_SP] + ([_DX] * s)||([_DX] * s) + disp32||[_SI] + ([_DX] * s)||[_DI] + ([_DX] * s)
|-
|-
! 0 !! b011
! 0 !! b011
|[RAX] + ([RBX] * s)||[RCX] + ([RBX] * s)||[RDX] + ([RBX] * s)||[RBX] + ([RBX] * s)||[RSP] + ([RBX] * s)||([RBX] * s) + disp32||[RSI] + ([RBX] * s)||[RDI] + ([RBX] * s)
|[_AX] + ([_BX] * s)||[_CX] + ([_BX] * s)||[_DX] + ([_BX] * s)||[_BX] + ([_BX] * s)||[_SP] + ([_BX] * s)||([_BX] * s) + disp32||[_SI] + ([_BX] * s)||[_DI] + ([_BX] * s)
|-
|-
! 0 !! b100
! 0 !! b100
|[RAX]||[RCX]||[RDX]||[RBX]||[RSP]||disp32||[RSI]||[RDI]
|[_AX]||[_CX]||[_DX]||[_BX]||[_SP]||disp32||[_SI]||[_DI]
|-
|-
! 0 !! b101
! 0 !! b101
|[RAX] + ([RBP] * s)||[RCX] + ([RBP] * s)||[RDX] + ([RBP] * s)||[RBX] + ([RBP] * s)||[RSP] + ([RBP] * s)||([RBP] * s) + disp32||[RSI] + ([RBP] * s)||[RDI] + ([RBP] * s)
|[_AX] + ([_BP] * s)||[_CX] + ([_BP] * s)||[_DX] + ([_BP] * s)||[_BX] + ([_BP] * s)||[_SP] + ([_BP] * s)||([_BP] * s) + disp32||[_SI] + ([_BP] * s)||[_DI] + ([_BP] * s)
|-
|-
! 0 !! b110
! 0 !! b110
|[RAX] + ([RSI] * s)||[RCX] + ([RSI] * s)||[RDX] + ([RSI] * s)||[RBX] + ([RSI] * s)||[RSP] + ([RSI] * s)||([RSI] * s) + disp32||[RSI] + ([RSI] * s)||[RDI] + ([RSI] * s)
|[_AX] + ([_SI] * s)||[_CX] + ([_SI] * s)||[_DX] + ([_SI] * s)||[_BX] + ([_SI] * s)||[_SP] + ([_SI] * s)||([_SI] * s) + disp32||[_SI] + ([_SI] * s)||[_DI] + ([_SI] * s)
|-
|-
! 0 !! b111
! 0 !! b111
|[RAX] + ([RDI] * s)||[RCX] + ([RDI] * s)||[RDX] + ([RDI] * s)||[RBX] + ([RDI] * s)||[RSP] + ([RDI] * s)||([RDI] * s) + disp32||[RSI] + ([RDI] * s)||[RDI] + ([RDI] * s)
|[_AX] + ([_DI] * s)||[_CX] + ([_DI] * s)||[_DX] + ([_DI] * s)||[_BX] + ([_DI] * s)||[_SP] + ([_DI] * s)||([_DI] * s) + disp32||[_SI] + ([_DI] * s)||[_DI] + ([_DI] * s)
|-
|-
! 1 !! b000
! 1 !! b000
|[RAX] + ([R8] * s)||[RCX] + ([R8] * s)||[RDX] + ([R8] * s)||[RBX] + ([R8] * s)||[RSP] + ([R8] * s)||([R8] * s) + disp32||[RSI] + ([R8] * s)||[RDI] + ([R8] * s)
|[_AX] + ([R8_] * s)||[_CX] + ([R8_] * s)||[_DX] + ([R8_] * s)||[_BX] + ([R8_] * s)||[_SP] + ([R8_] * s)||([R8_] * s) + disp32||[_SI] + ([R8_] * s)||[_DI] + ([R8_] * s)
|-
|-
! 1 !! b001
! 1 !! b001
|[RAX] + ([R9] * s)||[RCX] + ([R9] * s)||[RDX] + ([R9] * s)||[RBX] + ([R9] * s)||[RSP] + ([R9] * s)||([R9] * s) + disp32||[RSI] + ([R9] * s)||[RDI] + ([R9] * s)
|[_AX] + ([R9_] * s)||[_CX] + ([R9_] * s)||[_DX] + ([R9_] * s)||[_BX] + ([R9_] * s)||[_SP] + ([R9_] * s)||([R9_] * s) + disp32||[_SI] + ([R9_] * s)||[_DI] + ([R9_] * s)
|-
|-
! 1 !! b010
! 1 !! b010
|[RAX] + ([R10] * s)||[RCX] + ([R10] * s)||[RDX] + ([R10] * s)||[RBX] + ([R10] * s)||[RSP] + ([R10] * s)||([R10] * s) + disp32||[RSI] + ([R10] * s)||[RDI] + ([R10] * s)
|[_AX] + ([R10_] * s)||[_CX] + ([R10_] * s)||[_DX] + ([R10_] * s)||[_BX] + ([R10_] * s)||[_SP] + ([R10_] * s)||([R10_] * s) + disp32||[_SI] + ([R10_] * s)||[_DI] + ([R10_] * s)
|-
|-
! 1 !! b011
! 1 !! b011
|[RAX] + ([R11] * s)||[RCX] + ([R11] * s)||[RDX] + ([R11] * s)||[RBX] + ([R11] * s)||[RSP] + ([R11] * s)||([R11] * s) + disp32||[RSI] + ([R11] * s)||[RDI] + ([R11] * s)
|[_AX] + ([R11_] * s)||[_CX] + ([R11_] * s)||[_DX] + ([R11_] * s)||[_BX] + ([R11_] * s)||[_SP] + ([R11_] * s)||([R11_] * s) + disp32||[_SI] + ([R11_] * s)||[_DI] + ([R11_] * s)
|-
|-
! 1 !! b100
! 1 !! b100
|[RAX] + ([R12] * s)||[RCX] + ([R12] * s)||[RDX] + ([R12] * s)||[RBX] + ([R12] * s)||[RSP] + ([R12] * s)||disp32||[RSI] + ([R12] * s)||[RDI] + ([R12] * s)
|[_AX] + ([R12_] * s)||[_CX] + ([R12_] * s)||[_DX] + ([R12_] * s)||[_BX] + ([R12_] * s)||[_SP] + ([R12_] * s)||disp32||[_SI] + ([R12_] * s)||[_DI] + ([R12_] * s)
|-
|-
! 1 !! b101
! 1 !! b101
|[RAX] + ([R13] * s)||[RCX] + ([R13] * s)||[RDX] + ([R13] * s)||[RBX] + ([R13] * s)||[RSP] + ([R13] * s)||([R13] * s) + disp32||[RSI] + ([R13] * s)||[RDI] + ([R13] * s)
|[_AX] + ([R13_] * s)||[_CX] + ([R13_] * s)||[_DX] + ([R13_] * s)||[_BX] + ([R13_] * s)||[_SP] + ([R13_] * s)||([R13_] * s) + disp32||[_SI] + ([R13_] * s)||[_DI] + ([R13_] * s)
|-
|-
! 1 !! b110
! 1 !! b110
|[RAX] + ([R14] * s)||[RCX] + ([R14] * s)||[RDX] + ([R14] * s)||[RBX] + ([R14] * s)||[RSP] + ([R14] * s)||([R14] * s) + disp32||[RSI] + ([R14] * s)||[RDI] + ([R14] * s)
|[_AX] + ([R14_] * s)||[_CX] + ([R14_] * s)||[_DX] + ([R14_] * s)||[_BX] + ([R14_] * s)||[_SP] + ([R14_] * s)||([R14_] * s) + disp32||[_SI] + ([R14_] * s)||[_DI] + ([R14_] * s)
|-
|-
! 1 !! b111
! 1 !! b111
|[RAX] + ([R15] * s)||[RCX] + ([R15] * s)||[RDX] + ([R15] * s)||[RBX] + ([R15] * s)||[RSP] + ([R15] * s)||([R15] * s) + disp32||[RSI] + ([R15] * s)||[RDI] + ([R15] * s)
|[_AX] + ([R15_] * s)||[_CX] + ([R15_] * s)||[_DX] + ([R15_] * s)||[_BX] + ([R15_] * s)||[_SP] + ([R15_] * s)||([R15_] * s) + disp32||[_SI] + ([R15_] * s)||[_DI] + ([R15_] * s)
|-
|-
| colspan="11" style="background-color: white; border-top: solid 2px black; border-bottom: solid 2px black; border-left: none; border-right: none;" |
| colspan="11" style="background-color: white; border-top: solid 2px black; border-bottom: solid 2px black; border-left: none; border-right: none;" |
Line 726: Line 726:
|-
|-
! rowspan="16" | b00 !! 0 !! b000
! rowspan="16" | b00 !! 0 !! b000
|[R8] + ([RAX] * s)||[R9] + ([RAX] * s)||[R10] + ([RAX] * s)||[R11] + ([RAX] * s)||[R12] + ([RAX] * s)||([RAX] * s) + disp32||[R14] + ([RAX] * s)||[R15] + ([RAX] * s)
|[R8_] + ([_AX] * s)||[R9_] + ([_AX] * s)||[R10_] + ([_AX] * s)||[R11_] + ([_AX] * s)||[R12_] + ([_AX] * s)||([_AX] * s) + disp32||[R14_] + ([_AX] * s)||[R15_] + ([_AX] * s)
|-
|-
! 0 !! b001
! 0 !! b001
|[R8] + ([RCX] * s)||[R9] + ([RCX] * s)||[R10] + ([RCX] * s)||[R11] + ([RCX] * s)||[R12] + ([RCX] * s)||([RCX] * s) + disp32||[R14] + ([RCX] * s)||[R15] + ([RCX] * s)
|[R8_] + ([_CX] * s)||[R9_] + ([_CX] * s)||[R10_] + ([_CX] * s)||[R11_] + ([_CX] * s)||[R12_] + ([_CX] * s)||([_CX] * s) + disp32||[R14_] + ([_CX] * s)||[R15_] + ([_CX] * s)
|-
|-
! 0 !! b010
! 0 !! b010
|[R8] + ([RDX] * s)||[R9] + ([RDX] * s)||[R10] + ([RDX] * s)||[R11] + ([RDX] * s)||[R12] + ([RDX] * s)||([RDX] * s) + disp32||[R14] + ([RDX] * s)||[R15] + ([RDX] * s)
|[R8_] + ([_DX] * s)||[R9_] + ([_DX] * s)||[R10_] + ([_DX] * s)||[R11_] + ([_DX] * s)||[R12_] + ([_DX] * s)||([_DX] * s) + disp32||[R14_] + ([_DX] * s)||[R15_] + ([_DX] * s)
|-
|-
! 0 !! b011
! 0 !! b011
|[R8] + ([RBX] * s)||[R9] + ([RBX] * s)||[R10] + ([RBX] * s)||[R11] + ([RBX] * s)||[R12] + ([RBX] * s)||([RBX] * s) + disp32||[R14] + ([RBX] * s)||[R15] + ([RBX] * s)
|[R8_] + ([_BX] * s)||[R9_] + ([_BX] * s)||[R10_] + ([_BX] * s)||[R11_] + ([_BX] * s)||[R12_] + ([_BX] * s)||([_BX] * s) + disp32||[R14_] + ([_BX] * s)||[R15_] + ([_BX] * s)
|-
|-
! 0 !! b100
! 0 !! b100
|[R8]||[R9]||[R10]||[R11]||[R12]||disp32||[R14]||[R15]
|[R8_]||[R9_]||[R10_]||[R11_]||[R12_]||disp32||[R14_]||[R15_]
|-
|-
! 0 !! b101
! 0 !! b101
|[R8] + ([RBP] * s)||[R9] + ([RBP] * s)||[R10] + ([RBP] * s)||[R11] + ([RBP] * s)||[R12] + ([RBP] * s)||([RBP] * s) + disp32||[R14] + ([RBP] * s)||[R15] + ([RBP] * s)
|[R8_] + ([_BP] * s)||[R9_] + ([_BP] * s)||[R10_] + ([_BP] * s)||[R11_] + ([_BP] * s)||[R12_] + ([_BP] * s)||([_BP] * s) + disp32||[R14_] + ([_BP] * s)||[R15_] + ([_BP] * s)
|-
|-
! 0 !! b110
! 0 !! b110
|[R8] + ([RSI] * s)||[R9] + ([RSI] * s)||[R10] + ([RSI] * s)||[R11] + ([RSI] * s)||[R12] + ([RSI] * s)||([RSI] * s) + disp32||[R14] + ([RSI] * s)||[R15] + ([RSI] * s)
|[R8_] + ([_SI] * s)||[R9_] + ([_SI] * s)||[R10_] + ([_SI] * s)||[R11_] + ([_SI] * s)||[R12_] + ([_SI] * s)||([_SI] * s) + disp32||[R14_] + ([_SI] * s)||[R15_] + ([_SI] * s)
|-
|-
! 0 !! b111
! 0 !! b111
|[R8] + ([RDI] * s)||[R9] + ([RDI] * s)||[R10] + ([RDI] * s)||[R11] + ([RDI] * s)||[R12] + ([RDI] * s)||([RDI] * s) + disp32||[R14] + ([RDI] * s)||[R15] + ([RDI] * s)
|[R8_] + ([_DI] * s)||[R9_] + ([_DI] * s)||[R10_] + ([_DI] * s)||[R11_] + ([_DI] * s)||[R12_] + ([_DI] * s)||([_DI] * s) + disp32||[R14_] + ([_DI] * s)||[R15_] + ([_DI] * s)
|-
|-
! 1 !! b000
! 1 !! b000
|[R8] + ([R8] * s)||[R9] + ([R8] * s)||[R10] + ([R8] * s)||[R11] + ([R8] * s)||[R12] + ([R8] * s)||([R8] * s) + disp32||[R14] + ([R8] * s)||[R15] + ([R8] * s)
|[R8_] + ([R8_] * s)||[R9_] + ([R8_] * s)||[R10_] + ([R8_] * s)||[R11_] + ([R8_] * s)||[R12_] + ([R8_] * s)||([R8_] * s) + disp32||[R14_] + ([R8_] * s)||[R15_] + ([R8_] * s)
|-
|-
! 1 !! b001
! 1 !! b001
|[R8] + ([R9] * s)||[R9] + ([R9] * s)||[R10] + ([R9] * s)||[R11] + ([R9] * s)||[R12] + ([R9] * s)||([R9] * s) + disp32||[R14] + ([R9] * s)||[R15] + ([R9] * s)
|[R8_] + ([R9_] * s)||[R9_] + ([R9_] * s)||[R10_] + ([R9_] * s)||[R11_] + ([R9_] * s)||[R12_] + ([R9_] * s)||([R9_] * s) + disp32||[R14_] + ([R9_] * s)||[R15_] + ([R9_] * s)
|-
|-
! 1 !! b010
! 1 !! b010
|[R8] + ([R10] * s)||[R9] + ([R10] * s)||[R10] + ([R10] * s)||[R11] + ([R10] * s)||[R12] + ([R10] * s)||([R10] * s) + disp32||[R14] + ([R10] * s)||[R15] + ([R10] * s)
|[R8_] + ([R10_] * s)||[R9_] + ([R10_] * s)||[R10_] + ([R10_] * s)||[R11_] + ([R10_] * s)||[R12_] + ([R10_] * s)||([R10_] * s) + disp32||[R14_] + ([R10_] * s)||[R15_] + ([R10_] * s)
|-
|-
! 1 !! b011
! 1 !! b011
|[R8] + ([R11] * s)||[R9] + ([R11] * s)||[R10] + ([R11] * s)||[R11] + ([R11] * s)||[R12] + ([R11] * s)||([R11] * s) + disp32||[R14] + ([R11] * s)||[R15] + ([R11] * s)
|[R8_] + ([R11_] * s)||[R9_] + ([R11_] * s)||[R10_] + ([R11_] * s)||[R11_] + ([R11_] * s)||[R12_] + ([R11_] * s)||([R11_] * s) + disp32||[R14_] + ([R11_] * s)||[R15_] + ([R11_] * s)
|-
|-
! 1 !! b100
! 1 !! b100
|[R8] + ([R12] * s)||[R9] + ([R12] * s)||[R10] + ([R12] * s)||[R11] + ([R12] * s)||[R12] + ([R12] * s)||disp32||[R14] + ([R12] * s)||[R15] + ([R12] * s)
|[R8_] + ([R12_] * s)||[R9_] + ([R12_] * s)||[R10_] + ([R12_] * s)||[R11_] + ([R12_] * s)||[R12_] + ([R12_] * s)||disp32||[R14_] + ([R12_] * s)||[R15_] + ([R12_] * s)
|-
|-
! 1 !! b101
! 1 !! b101
|[R8] + ([R13] * s)||[R9] + ([R13] * s)||[R10] + ([R13] * s)||[R11] + ([R13] * s)||[R12] + ([R13] * s)||([R13] * s) + disp32||[R14] + ([R13] * s)||[R15] + ([R13] * s)
|[R8_] + ([R13_] * s)||[R9_] + ([R13_] * s)||[R10_] + ([R13_] * s)||[R11_] + ([R13_] * s)||[R12_] + ([R13_] * s)||([R13_] * s) + disp32||[R14_] + ([R13_] * s)||[R15_] + ([R13_] * s)
|-
|-
! 1 !! b110
! 1 !! b110
|[R8] + ([R14] * s)||[R9] + ([R14] * s)||[R10] + ([R14] * s)||[R11] + ([R14] * s)||[R12] + ([R14] * s)||([R14] * s) + disp32||[R14] + ([R14] * s)||[R15] + ([R14] * s)
|[R8_] + ([R14_] * s)||[R9_] + ([R14_] * s)||[R10_] + ([R14_] * s)||[R11_] + ([R14_] * s)||[R12_] + ([R14_] * s)||([R14_] * s) + disp32||[R14_] + ([R14_] * s)||[R15_] + ([R14_] * s)
|-
|-
! 1 !! b111
! 1 !! b111
|[R8] + ([R15] * s)||[R9] + ([R15] * s)||[R10] + ([R15] * s)||[R11] + ([R15] * s)||[R12] + ([R15] * s)||([R15] * s) + disp32||[R14] + ([R15] * s)||[R15] + ([R15] * s)
|[R8_] + ([R15_] * s)||[R9_] + ([R15_] * s)||[R10_] + ([R15_] * s)||[R11_] + ([R15_] * s)||[R12_] + ([R15_] * s)||([R15_] * s) + disp32||[R14_] + ([R15_] * s)||[R15_] + ([R15_] * s)
|-
|-
| colspan="11" style="background-color: white; border-top: solid 2px black; border-bottom: solid 2px black; border-left: none; border-right: none;" |
| colspan="11" style="background-color: white; border-top: solid 2px black; border-bottom: solid 2px black; border-left: none; border-right: none;" |
Line 790: Line 790:
|-
|-
! rowspan="16" | b01 !! 0 !! b000
! rowspan="16" | b01 !! 0 !! b000
|[RAX] + ([RAX] * s) + disp8||[RCX] + ([RAX] * s) + disp8||[RDX] + ([RAX] * s) + disp8||[RBX] + ([RAX] * s) + disp8||[RSP] + ([RAX] * s) + disp8||[RBP] + ([RAX] * s) + disp8||[RSI] + ([RAX] * s) + disp8||[RDI] + ([RAX] * s) + disp8
|[_AX] + ([_AX] * s) + disp8||[_CX] + ([_AX] * s) + disp8||[_DX] + ([_AX] * s) + disp8||[_BX] + ([_AX] * s) + disp8||[_SP] + ([_AX] * s) + disp8||[_BP] + ([_AX] * s) + disp8||[_SI] + ([_AX] * s) + disp8||[_DI] + ([_AX] * s) + disp8
|-
|-
! 0 !! b001
! 0 !! b001
|[RAX] + ([RCX] * s) + disp8||[RCX] + ([RCX] * s) + disp8||[RDX] + ([RCX] * s) + disp8||[RBX] + ([RCX] * s) + disp8||[RSP] + ([RCX] * s) + disp8||[RBP] + ([RCX] * s) + disp8||[RSI] + ([RCX] * s) + disp8||[RDI] + ([RCX] * s) + disp8
|[_AX] + ([_CX] * s) + disp8||[_CX] + ([_CX] * s) + disp8||[_DX] + ([_CX] * s) + disp8||[_BX] + ([_CX] * s) + disp8||[_SP] + ([_CX] * s) + disp8||[_BP] + ([_CX] * s) + disp8||[_SI] + ([_CX] * s) + disp8||[_DI] + ([_CX] * s) + disp8
|-
|-
! 0 !! b010
! 0 !! b010
|[RAX] + ([RDX] * s) + disp8||[RCX] + ([RDX] * s) + disp8||[RDX] + ([RDX] * s) + disp8||[RBX] + ([RDX] * s) + disp8||[RSP] + ([RDX] * s) + disp8||[RBP] + ([RDX] * s) + disp8||[RSI] + ([RDX] * s) + disp8||[RDI] + ([RDX] * s) + disp8
|[_AX] + ([_DX] * s) + disp8||[_CX] + ([_DX] * s) + disp8||[_DX] + ([_DX] * s) + disp8||[_BX] + ([_DX] * s) + disp8||[_SP] + ([_DX] * s) + disp8||[_BP] + ([_DX] * s) + disp8||[_SI] + ([_DX] * s) + disp8||[_DI] + ([_DX] * s) + disp8
|-
|-
! 0 !! b011
! 0 !! b011
|[RAX] + ([RBX] * s) + disp8||[RCX] + ([RBX] * s) + disp8||[RDX] + ([RBX] * s) + disp8||[RBX] + ([RBX] * s) + disp8||[RSP] + ([RBX] * s) + disp8||[RBP] + ([RBX] * s) + disp8||[RSI] + ([RBX] * s) + disp8||[RDI] + ([RBX] * s) + disp8
|[_AX] + ([_BX] * s) + disp8||[_CX] + ([_BX] * s) + disp8||[_DX] + ([_BX] * s) + disp8||[_BX] + ([_BX] * s) + disp8||[_SP] + ([_BX] * s) + disp8||[_BP] + ([_BX] * s) + disp8||[_SI] + ([_BX] * s) + disp8||[_DI] + ([_BX] * s) + disp8
|-
|-
! 0 !! b100
! 0 !! b100
|[RAX] + disp8||[RCX] + disp8||[RDX] + disp8||[RBX] + disp8||[RSP] + disp8||[RBP] + disp8||[RSI] + disp8||[RDI] + disp8
|[_AX] + disp8||[_CX] + disp8||[_DX] + disp8||[_BX] + disp8||[_SP] + disp8||[_BP] + disp8||[_SI] + disp8||[_DI] + disp8
|-
|-
! 0 !! b101
! 0 !! b101
|[RAX] + ([RBP] * s) + disp8||[RCX] + ([RBP] * s) + disp8||[RDX] + ([RBP] * s) + disp8||[RBX] + ([RBP] * s) + disp8||[RSP] + ([RBP] * s) + disp8||[RBP] + ([RBP] * s) + disp8||[RSI] + ([RBP] * s) + disp8||[RDI] + ([RBP] * s) + disp8
|[_AX] + ([_BP] * s) + disp8||[_CX] + ([_BP] * s) + disp8||[_DX] + ([_BP] * s) + disp8||[_BX] + ([_BP] * s) + disp8||[_SP] + ([_BP] * s) + disp8||[_BP] + ([_BP] * s) + disp8||[_SI] + ([_BP] * s) + disp8||[_DI] + ([_BP] * s) + disp8
|-
|-
! 0 !! b110
! 0 !! b110
|[RAX] + ([RSI] * s) + disp8||[RCX] + ([RSI] * s) + disp8||[RDX] + ([RSI] * s) + disp8||[RBX] + ([RSI] * s) + disp8||[RSP] + ([RSI] * s) + disp8||[RBP] + ([RSI] * s) + disp8||[RSI] + ([RSI] * s) + disp8||[RDI] + ([RSI] * s) + disp8
|[_AX] + ([_SI] * s) + disp8||[_CX] + ([_SI] * s) + disp8||[_DX] + ([_SI] * s) + disp8||[_BX] + ([_SI] * s) + disp8||[_SP] + ([_SI] * s) + disp8||[_BP] + ([_SI] * s) + disp8||[_SI] + ([_SI] * s) + disp8||[_DI] + ([_SI] * s) + disp8
|-
|-
! 0 !! b111
! 0 !! b111
|[RAX] + ([RDI] * s) + disp8||[RCX] + ([RDI] * s) + disp8||[RDX] + ([RDI] * s) + disp8||[RBX] + ([RDI] * s) + disp8||[RSP] + ([RDI] * s) + disp8||[RBP] + ([RDI] * s) + disp8||[RSI] + ([RDI] * s) + disp8||[RDI] + ([RDI] * s) + disp8
|[_AX] + ([_DI] * s) + disp8||[_CX] + ([_DI] * s) + disp8||[_DX] + ([_DI] * s) + disp8||[_BX] + ([_DI] * s) + disp8||[_SP] + ([_DI] * s) + disp8||[_BP] + ([_DI] * s) + disp8||[_SI] + ([_DI] * s) + disp8||[_DI] + ([_DI] * s) + disp8
|-
|-
! 1 !! b000
! 1 !! b000
|[RAX] + ([R8] * s) + disp8||[RCX] + ([R8] * s) + disp8||[RDX] + ([R8] * s) + disp8||[RBX] + ([R8] * s) + disp8||[RSP] + ([R8] * s) + disp8||[RBP] + ([R8] * s) + disp8||[RSI] + ([R8] * s) + disp8||[RDI] + ([R8] * s) + disp8
|[_AX] + ([R8_] * s) + disp8||[_CX] + ([R8_] * s) + disp8||[_DX] + ([R8_] * s) + disp8||[_BX] + ([R8_] * s) + disp8||[_SP] + ([R8_] * s) + disp8||[_BP] + ([R8_] * s) + disp8||[_SI] + ([R8_] * s) + disp8||[_DI] + ([R8_] * s) + disp8
|-
|-
! 1 !! b001
! 1 !! b001
|[RAX] + ([R9] * s) + disp8||[RCX] + ([R9] * s) + disp8||[RDX] + ([R9] * s) + disp8||[RBX] + ([R9] * s) + disp8||[RSP] + ([R9] * s) + disp8||[RBP] + ([R9] * s) + disp8||[RSI] + ([R9] * s) + disp8||[RDI] + ([R9] * s) + disp8
|[_AX] + ([R9_] * s) + disp8||[_CX] + ([R9_] * s) + disp8||[_DX] + ([R9_] * s) + disp8||[_BX] + ([R9_] * s) + disp8||[_SP] + ([R9_] * s) + disp8||[_BP] + ([R9_] * s) + disp8||[_SI] + ([R9_] * s) + disp8||[_DI] + ([R9_] * s) + disp8
|-
|-
! 1 !! b010
! 1 !! b010
|[RAX] + ([R10] * s) + disp8||[RCX] + ([R10] * s) + disp8||[RDX] + ([R10] * s) + disp8||[RBX] + ([R10] * s) + disp8||[RSP] + ([R10] * s) + disp8||[RBP] + ([R10] * s) + disp8||[RSI] + ([R10] * s) + disp8||[RDI] + ([R10] * s) + disp8
|[_AX] + ([R10_] * s) + disp8||[_CX] + ([R10_] * s) + disp8||[_DX] + ([R10_] * s) + disp8||[_BX] + ([R10_] * s) + disp8||[_SP] + ([R10_] * s) + disp8||[_BP] + ([R10_] * s) + disp8||[_SI] + ([R10_] * s) + disp8||[_DI] + ([R10_] * s) + disp8
|-
|-
! 1 !! b011
! 1 !! b011
|[RAX] + ([R11] * s) + disp8||[RCX] + ([R11] * s) + disp8||[RDX] + ([R11] * s) + disp8||[RBX] + ([R11] * s) + disp8||[RSP] + ([R11] * s) + disp8||[RBP] + ([R11] * s) + disp8||[RSI] + ([R11] * s) + disp8||[RDI] + ([R11] * s) + disp8
|[_AX] + ([R11_] * s) + disp8||[_CX] + ([R11_] * s) + disp8||[_DX] + ([R11_] * s) + disp8||[_BX] + ([R11_] * s) + disp8||[_SP] + ([R11_] * s) + disp8||[_BP] + ([R11_] * s) + disp8||[_SI] + ([R11_] * s) + disp8||[_DI] + ([R11_] * s) + disp8
|-
|-
! 1 !! b100
! 1 !! b100
|[RAX] + ([R12] * s) + disp8||[RCX] + ([R12] * s) + disp8||[RDX] + ([R12] * s) + disp8||[RBX] + ([R12] * s) + disp8||[RSP] + ([R12] * s) + disp8||[RBP] + ([R12] * s) + disp8||[RSI] + ([R12] * s) + disp8||[RDI] + ([R12] * s) + disp8
|[_AX] + ([R12_] * s) + disp8||[_CX] + ([R12_] * s) + disp8||[_DX] + ([R12_] * s) + disp8||[_BX] + ([R12_] * s) + disp8||[_SP] + ([R12_] * s) + disp8||[_BP] + ([R12_] * s) + disp8||[_SI] + ([R12_] * s) + disp8||[_DI] + ([R12_] * s) + disp8
|-
|-
! 1 !! b101
! 1 !! b101
|[RAX] + ([R13] * s) + disp8||[RCX] + ([R13] * s) + disp8||[RDX] + ([R13] * s) + disp8||[RBX] + ([R13] * s) + disp8||[RSP] + ([R13] * s) + disp8||[RBP] + ([R13] * s) + disp8||[RSI] + ([R13] * s) + disp8||[RDI] + ([R13] * s) + disp8
|[_AX] + ([R13_] * s) + disp8||[_CX] + ([R13_] * s) + disp8||[_DX] + ([R13_] * s) + disp8||[_BX] + ([R13_] * s) + disp8||[_SP] + ([R13_] * s) + disp8||[_BP] + ([R13_] * s) + disp8||[_SI] + ([R13_] * s) + disp8||[_DI] + ([R13_] * s) + disp8
|-
|-
! 1 !! b110
! 1 !! b110
|[RAX] + ([R14] * s) + disp8||[RCX] + ([R14] * s) + disp8||[RDX] + ([R14] * s) + disp8||[RBX] + ([R14] * s) + disp8||[RSP] + ([R14] * s) + disp8||[RBP] + ([R14] * s) + disp8||[RSI] + ([R14] * s) + disp8||[RDI] + ([R14] * s) + disp8
|[_AX] + ([R14_] * s) + disp8||[_CX] + ([R14_] * s) + disp8||[_DX] + ([R14_] * s) + disp8||[_BX] + ([R14_] * s) + disp8||[_SP] + ([R14_] * s) + disp8||[_BP] + ([R14_] * s) + disp8||[_SI] + ([R14_] * s) + disp8||[_DI] + ([R14_] * s) + disp8
|-
|-
! 1 !! b111
! 1 !! b111
|[RAX] + ([R15] * s) + disp8||[RCX] + ([R15] * s) + disp8||[RDX] + ([R15] * s) + disp8||[RBX] + ([R15] * s) + disp8||[RSP] + ([R15] * s) + disp8||[RBP] + ([R15] * s) + disp8||[RSI] + ([R15] * s) + disp8||[RDI] + ([R15] * s) + disp8
|[_AX] + ([R15_] * s) + disp8||[_CX] + ([R15_] * s) + disp8||[_DX] + ([R15_] * s) + disp8||[_BX] + ([R15_] * s) + disp8||[_SP] + ([R15_] * s) + disp8||[_BP] + ([R15_] * s) + disp8||[_SI] + ([R15_] * s) + disp8||[_DI] + ([R15_] * s) + disp8
|-
|-
| colspan="11" style="background-color: white; border-top: solid 2px black; border-bottom: solid 2px black; border-left: none; border-right: none;" |
| colspan="11" style="background-color: white; border-top: solid 2px black; border-bottom: solid 2px black; border-left: none; border-right: none;" |
Line 854: Line 854:
|-
|-
! rowspan="16" | b01 !! 0 !! b000
! rowspan="16" | b01 !! 0 !! b000
|[R8] + ([RAX] * s) + disp8||[R9] + ([RAX] * s) + disp8||[R10] + ([RAX] * s) + disp8||[R11] + ([RAX] * s) + disp8||[R12] + ([RAX] * s) + disp8||[R13] + ([RAX] * s) + disp8||[R14] + ([RAX] * s) + disp8||[R15] + ([RAX] * s) + disp8
|[R8_] + ([_AX] * s) + disp8||[R9_] + ([_AX] * s) + disp8||[R10_] + ([_AX] * s) + disp8||[R11_] + ([_AX] * s) + disp8||[R12_] + ([_AX] * s) + disp8||[R13_] + ([_AX] * s) + disp8||[R14_] + ([_AX] * s) + disp8||[R15_] + ([_AX] * s) + disp8
|-
|-
! 0 !! b001
! 0 !! b001
|[R8] + ([RCX] * s) + disp8||[R9] + ([RCX] * s) + disp8||[R10] + ([RCX] * s) + disp8||[R11] + ([RCX] * s) + disp8||[R12] + ([RCX] * s) + disp8||[R13] + ([RCX] * s) + disp8||[R14] + ([RCX] * s) + disp8||[R15] + ([RCX] * s) + disp8
|[R8_] + ([_CX] * s) + disp8||[R9_] + ([_CX] * s) + disp8||[R10_] + ([_CX] * s) + disp8||[R11_] + ([_CX] * s) + disp8||[R12_] + ([_CX] * s) + disp8||[R13_] + ([_CX] * s) + disp8||[R14_] + ([_CX] * s) + disp8||[R15_] + ([_CX] * s) + disp8
|-
|-
! 0 !! b010
! 0 !! b010
|[R8] + ([RDX] * s) + disp8||[R9] + ([RDX] * s) + disp8||[R10] + ([RDX] * s) + disp8||[R11] + ([RDX] * s) + disp8||[R12] + ([RDX] * s) + disp8||[R13] + ([RDX] * s) + disp8||[R14] + ([RDX] * s) + disp8||[R15] + ([RDX] * s) + disp8
|[R8_] + ([_DX] * s) + disp8||[R9_] + ([_DX] * s) + disp8||[R10_] + ([_DX] * s) + disp8||[R11_] + ([_DX] * s) + disp8||[R12_] + ([_DX] * s) + disp8||[R13_] + ([_DX] * s) + disp8||[R14_] + ([_DX] * s) + disp8||[R15_] + ([_DX] * s) + disp8
|-
|-
! 0 !! b011
! 0 !! b011
|[R8] + ([RBX] * s) + disp8||[R9] + ([RBX] * s) + disp8||[R10] + ([RBX] * s) + disp8||[R11] + ([RBX] * s) + disp8||[R12] + ([RBX] * s) + disp8||[R13] + ([RBX] * s) + disp8||[R14] + ([RBX] * s) + disp8||[R15] + ([RBX] * s) + disp8
|[R8_] + ([_BX] * s) + disp8||[R9_] + ([_BX] * s) + disp8||[R10_] + ([_BX] * s) + disp8||[R11_] + ([_BX] * s) + disp8||[R12_] + ([_BX] * s) + disp8||[R13_] + ([_BX] * s) + disp8||[R14_] + ([_BX] * s) + disp8||[R15_] + ([_BX] * s) + disp8
|-
|-
! 0 !! b100
! 0 !! b100
|[R8] + disp8||[R9] + disp8||[R10] + disp8||[R11] + disp8||[R12] + disp8||[R13] + disp8||[R14] + disp8||[R15] + disp8
|[R8_] + disp8||[R9_] + disp8||[R10_] + disp8||[R11_] + disp8||[R12_] + disp8||[R13_] + disp8||[R14_] + disp8||[R15_] + disp8
|-
|-
! 0 !! b101
! 0 !! b101
|[R8] + ([RBP] * s) + disp8||[R9] + ([RBP] * s) + disp8||[R10] + ([RBP] * s) + disp8||[R11] + ([RBP] * s) + disp8||[R12] + ([RBP] * s) + disp8||[R13] + ([RBP] * s) + disp8||[R14] + ([RBP] * s) + disp8||[R15] + ([RBP] * s) + disp8
|[R8_] + ([_BP] * s) + disp8||[R9_] + ([_BP] * s) + disp8||[R10_] + ([_BP] * s) + disp8||[R11_] + ([_BP] * s) + disp8||[R12_] + ([_BP] * s) + disp8||[R13_] + ([_BP] * s) + disp8||[R14_] + ([_BP] * s) + disp8||[R15_] + ([_BP] * s) + disp8
|-
|-
! 0 !! b110
! 0 !! b110
|[R8] + ([RSI] * s) + disp8||[R9] + ([RSI] * s) + disp8||[R10] + ([RSI] * s) + disp8||[R11] + ([RSI] * s) + disp8||[R12] + ([RSI] * s) + disp8||[R13] + ([RSI] * s) + disp8||[R14] + ([RSI] * s) + disp8||[R15] + ([RSI] * s) + disp8
|[R8_] + ([_SI] * s) + disp8||[R9_] + ([_SI] * s) + disp8||[R10_] + ([_SI] * s) + disp8||[R11_] + ([_SI] * s) + disp8||[R12_] + ([_SI] * s) + disp8||[R13_] + ([_SI] * s) + disp8||[R14_] + ([_SI] * s) + disp8||[R15_] + ([_SI] * s) + disp8
|-
|-
! 0 !! b111
! 0 !! b111
|[R8] + ([RDI] * s) + disp8||[R9] + ([RDI] * s) + disp8||[R10] + ([RDI] * s) + disp8||[R11] + ([RDI] * s) + disp8||[R12] + ([RDI] * s) + disp8||[R13] + ([RDI] * s) + disp8||[R14] + ([RDI] * s) + disp8||[R15] + ([RDI] * s) + disp8
|[R8_] + ([_DI] * s) + disp8||[R9_] + ([_DI] * s) + disp8||[R10_] + ([_DI] * s) + disp8||[R11_] + ([_DI] * s) + disp8||[R12_] + ([_DI] * s) + disp8||[R13_] + ([_DI] * s) + disp8||[R14_] + ([_DI] * s) + disp8||[R15_] + ([_DI] * s) + disp8
|-
|-
! 1 !! b000
! 1 !! b000
|[R8] + ([R8] * s) + disp8||[R9] + ([R8] * s) + disp8||[R10] + ([R8] * s) + disp8||[R11] + ([R8] * s) + disp8||[R12] + ([R8] * s) + disp8||[R13] + ([R8] * s) + disp8||[R14] + ([R8] * s) + disp8||[R15] + ([R8] * s) + disp8
|[R8_] + ([R8_] * s) + disp8||[R9_] + ([R8_] * s) + disp8||[R10_] + ([R8_] * s) + disp8||[R11_] + ([R8_] * s) + disp8||[R12_] + ([R8_] * s) + disp8||[R13_] + ([R8_] * s) + disp8||[R14_] + ([R8_] * s) + disp8||[R15_] + ([R8_] * s) + disp8
|-
|-
! 1 !! b001
! 1 !! b001
|[R8] + ([R9] * s) + disp8||[R9] + ([R9] * s) + disp8||[R10] + ([R9] * s) + disp8||[R11] + ([R9] * s) + disp8||[R12] + ([R9] * s) + disp8||[R13] + ([R9] * s) + disp8||[R14] + ([R9] * s) + disp8||[R15] + ([R9] * s) + disp8
|[R8_] + ([R9_] * s) + disp8||[R9_] + ([R9_] * s) + disp8||[R10_] + ([R9_] * s) + disp8||[R11_] + ([R9_] * s) + disp8||[R12_] + ([R9_] * s) + disp8||[R13_] + ([R9_] * s) + disp8||[R14_] + ([R9_] * s) + disp8||[R15_] + ([R9_] * s) + disp8
|-
|-
! 1 !! b010
! 1 !! b010
|[R8] + ([R10] * s) + disp8||[R9] + ([R10] * s) + disp8||[R10] + ([R10] * s) + disp8||[R11] + ([R10] * s) + disp8||[R12] + ([R10] * s) + disp8||[R13] + ([R10] * s) + disp8||[R14] + ([R10] * s) + disp8||[R15] + ([R10] * s) + disp8
|[R8_] + ([R10_] * s) + disp8||[R9_] + ([R10_] * s) + disp8||[R10_] + ([R10_] * s) + disp8||[R11_] + ([R10_] * s) + disp8||[R12_] + ([R10_] * s) + disp8||[R13_] + ([R10_] * s) + disp8||[R14_] + ([R10_] * s) + disp8||[R15_] + ([R10_] * s) + disp8
|-
|-
! 1 !! b011
! 1 !! b011
|[R8] + ([R11] * s) + disp8||[R9] + ([R11] * s) + disp8||[R10] + ([R11] * s) + disp8||[R11] + ([R11] * s) + disp8||[R12] + ([R11] * s) + disp8||[R13] + ([R11] * s) + disp8||[R14] + ([R11] * s) + disp8||[R15] + ([R11] * s) + disp8
|[R8_] + ([R11_] * s) + disp8||[R9_] + ([R11_] * s) + disp8||[R10_] + ([R11_] * s) + disp8||[R11_] + ([R11_] * s) + disp8||[R12_] + ([R11_] * s) + disp8||[R13_] + ([R11_] * s) + disp8||[R14_] + ([R11_] * s) + disp8||[R15_] + ([R11_] * s) + disp8
|-
|-
! 1 !! b100
! 1 !! b100
|[R8] + ([R12] * s) + disp8||[R9] + ([R12] * s) + disp8||[R10] + ([R12] * s) + disp8||[R11] + ([R12] * s) + disp8||[R12] + ([R12] * s) + disp8||[R13] + ([R12] * s) + disp8||[R14] + ([R12] * s) + disp8||[R15] + ([R12] * s) + disp8
|[R8_] + ([R12_] * s) + disp8||[R9_] + ([R12_] * s) + disp8||[R10_] + ([R12_] * s) + disp8||[R11_] + ([R12_] * s) + disp8||[R12_] + ([R12_] * s) + disp8||[R13_] + ([R12_] * s) + disp8||[R14_] + ([R12_] * s) + disp8||[R15_] + ([R12_] * s) + disp8
|-
|-
! 1 !! b101
! 1 !! b101
|[R8] + ([R13] * s) + disp8||[R9] + ([R13] * s) + disp8||[R10] + ([R13] * s) + disp8||[R11] + ([R13] * s) + disp8||[R12] + ([R13] * s) + disp8||[R13] + ([R13] * s) + disp8||[R14] + ([R13] * s) + disp8||[R15] + ([R13] * s) + disp8
|[R8_] + ([R13_] * s) + disp8||[R9_] + ([R13_] * s) + disp8||[R10_] + ([R13_] * s) + disp8||[R11_] + ([R13_] * s) + disp8||[R12_] + ([R13_] * s) + disp8||[R13_] + ([R13_] * s) + disp8||[R14_] + ([R13_] * s) + disp8||[R15_] + ([R13_] * s) + disp8
|-
|-
! 1 !! b110
! 1 !! b110
|[R8] + ([R14] * s) + disp8||[R9] + ([R14] * s) + disp8||[R10] + ([R14] * s) + disp8||[R11] + ([R14] * s) + disp8||[R12] + ([R14] * s) + disp8||[R13] + ([R14] * s) + disp8||[R14] + ([R14] * s) + disp8||[R15] + ([R14] * s) + disp8
|[R8_] + ([R14_] * s) + disp8||[R9_] + ([R14_] * s) + disp8||[R10_] + ([R14_] * s) + disp8||[R11_] + ([R14_] * s) + disp8||[R12_] + ([R14_] * s) + disp8||[R13_] + ([R14_] * s) + disp8||[R14_] + ([R14_] * s) + disp8||[R15_] + ([R14_] * s) + disp8
|-
|-
! 1 !! b111
! 1 !! b111
|[R8] + ([R15] * s) + disp8||[R9] + ([R15] * s) + disp8||[R10] + ([R15] * s) + disp8||[R11] + ([R15] * s) + disp8||[R12] + ([R15] * s) + disp8||[R13] + ([R15] * s) + disp8||[R14] + ([R15] * s) + disp8||[R15] + ([R15] * s) + disp8
|[R8_] + ([R15_] * s) + disp8||[R9_] + ([R15_] * s) + disp8||[R10_] + ([R15_] * s) + disp8||[R11_] + ([R15_] * s) + disp8||[R12_] + ([R15_] * s) + disp8||[R13_] + ([R15_] * s) + disp8||[R14_] + ([R15_] * s) + disp8||[R15_] + ([R15_] * s) + disp8
|-
|-
| colspan="11" style="background-color: white; border-top: solid 2px black; border-bottom: solid 2px black; border-left: none; border-right: none;" |
| colspan="11" style="background-color: white; border-top: solid 2px black; border-bottom: solid 2px black; border-left: none; border-right: none;" |
Line 918: Line 918:
|-
|-
! rowspan="16" | b10 !! 0 !! b000
! rowspan="16" | b10 !! 0 !! b000
|[RAX] + ([RAX] * s) + disp32||[RCX] + ([RAX] * s) + disp32||[RDX] + ([RAX] * s) + disp32||[RBX] + ([RAX] * s) + disp32||[RSP] + ([RAX] * s) + disp32||[RBP] + ([RAX] * s) + disp32||[RSI] + ([RAX] * s) + disp32||[RDI] + ([RAX] * s) + disp32
|[_AX] + ([_AX] * s) + disp32||[_CX] + ([_AX] * s) + disp32||[_DX] + ([_AX] * s) + disp32||[_BX] + ([_AX] * s) + disp32||[_SP] + ([_AX] * s) + disp32||[_BP] + ([_AX] * s) + disp32||[_SI] + ([_AX] * s) + disp32||[_DI] + ([_AX] * s) + disp32
|-
|-
! 0 !! b001
! 0 !! b001
|[RAX] + ([RCX] * s) + disp32||[RCX] + ([RCX] * s) + disp32||[RDX] + ([RCX] * s) + disp32||[RBX] + ([RCX] * s) + disp32||[RSP] + ([RCX] * s) + disp32||[RBP] + ([RCX] * s) + disp32||[RSI] + ([RCX] * s) + disp32||[RDI] + ([RCX] * s) + disp32
|[_AX] + ([_CX] * s) + disp32||[_CX] + ([_CX] * s) + disp32||[_DX] + ([_CX] * s) + disp32||[_BX] + ([_CX] * s) + disp32||[_SP] + ([_CX] * s) + disp32||[_BP] + ([_CX] * s) + disp32||[_SI] + ([_CX] * s) + disp32||[_DI] + ([_CX] * s) + disp32
|-
|-
! 0 !! b010
! 0 !! b010
|[RAX] + ([RDX] * s) + disp32||[RCX] + ([RDX] * s) + disp32||[RDX] + ([RDX] * s) + disp32||[RBX] + ([RDX] * s) + disp32||[RSP] + ([RDX] * s) + disp32||[RBP] + ([RDX] * s) + disp32||[RSI] + ([RDX] * s) + disp32||[RDI] + ([RDX] * s) + disp32
|[_AX] + ([_DX] * s) + disp32||[_CX] + ([_DX] * s) + disp32||[_DX] + ([_DX] * s) + disp32||[_BX] + ([_DX] * s) + disp32||[_SP] + ([_DX] * s) + disp32||[_BP] + ([_DX] * s) + disp32||[_SI] + ([_DX] * s) + disp32||[_DI] + ([_DX] * s) + disp32
|-
|-
! 0 !! b011
! 0 !! b011
|[RAX] + ([RBX] * s) + disp32||[RCX] + ([RBX] * s) + disp32||[RDX] + ([RBX] * s) + disp32||[RBX] + ([RBX] * s) + disp32||[RSP] + ([RBX] * s) + disp32||[RBP] + ([RBX] * s) + disp32||[RSI] + ([RBX] * s) + disp32||[RDI] + ([RBX] * s) + disp32
|[_AX] + ([_BX] * s) + disp32||[_CX] + ([_BX] * s) + disp32||[_DX] + ([_BX] * s) + disp32||[_BX] + ([_BX] * s) + disp32||[_SP] + ([_BX] * s) + disp32||[_BP] + ([_BX] * s) + disp32||[_SI] + ([_BX] * s) + disp32||[_DI] + ([_BX] * s) + disp32
|-
|-
! 0 !! b100
! 0 !! b100
|[RAX] + disp32||[RCX] + disp32||[RDX] + disp32||[RBX] + disp32||[RSP] + disp32||[RBP] + disp32||[RSI] + disp32||[RDI] + disp32
|[_AX] + disp32||[_CX] + disp32||[_DX] + disp32||[_BX] + disp32||[_SP] + disp32||[_BP] + disp32||[_SI] + disp32||[_DI] + disp32
|-
|-
! 0 !! b101
! 0 !! b101
|[RAX] + ([RBP] * s) + disp32||[RCX] + ([RBP] * s) + disp32||[RDX] + ([RBP] * s) + disp32||[RBX] + ([RBP] * s) + disp32||[RSP] + ([RBP] * s) + disp32||[RBP] + ([RBP] * s) + disp32||[RSI] + ([RBP] * s) + disp32||[RDI] + ([RBP] * s) + disp32
|[_AX] + ([_BP] * s) + disp32||[_CX] + ([_BP] * s) + disp32||[_DX] + ([_BP] * s) + disp32||[_BX] + ([_BP] * s) + disp32||[_SP] + ([_BP] * s) + disp32||[_BP] + ([_BP] * s) + disp32||[_SI] + ([_BP] * s) + disp32||[_DI] + ([_BP] * s) + disp32
|-
|-
! 0 !! b110
! 0 !! b110
|[RAX] + ([RSI] * s) + disp32||[RCX] + ([RSI] * s) + disp32||[RDX] + ([RSI] * s) + disp32||[RBX] + ([RSI] * s) + disp32||[RSP] + ([RSI] * s) + disp32||[RBP] + ([RSI] * s) + disp32||[RSI] + ([RSI] * s) + disp32||[RDI] + ([RSI] * s) + disp32
|[_AX] + ([_SI] * s) + disp32||[_CX] + ([_SI] * s) + disp32||[_DX] + ([_SI] * s) + disp32||[_BX] + ([_SI] * s) + disp32||[_SP] + ([_SI] * s) + disp32||[_BP] + ([_SI] * s) + disp32||[_SI] + ([_SI] * s) + disp32||[_DI] + ([_SI] * s) + disp32
|-
|-
! 0 !! b111
! 0 !! b111
|[RAX] + ([RDI] * s) + disp32||[RCX] + ([RDI] * s) + disp32||[RDX] + ([RDI] * s) + disp32||[RBX] + ([RDI] * s) + disp32||[RSP] + ([RDI] * s) + disp32||[RBP] + ([RDI] * s) + disp32||[RSI] + ([RDI] * s) + disp32||[RDI] + ([RDI] * s) + disp32
|[_AX] + ([_DI] * s) + disp32||[_CX] + ([_DI] * s) + disp32||[_DX] + ([_DI] * s) + disp32||[_BX] + ([_DI] * s) + disp32||[_SP] + ([_DI] * s) + disp32||[_BP] + ([_DI] * s) + disp32||[_SI] + ([_DI] * s) + disp32||[_DI] + ([_DI] * s) + disp32
|-
|-
! 1 !! b000
! 1 !! b000
|[RAX] + ([R8] * s) + disp32||[RCX] + ([R8] * s) + disp32||[RDX] + ([R8] * s) + disp32||[RBX] + ([R8] * s) + disp32||[RSP] + ([R8] * s) + disp32||[RBP] + ([R8] * s) + disp32||[RSI] + ([R8] * s) + disp32||[RDI] + ([R8] * s) + disp32
|[_AX] + ([R8_] * s) + disp32||[_CX] + ([R8_] * s) + disp32||[_DX] + ([R8_] * s) + disp32||[_BX] + ([R8_] * s) + disp32||[_SP] + ([R8_] * s) + disp32||[_BP] + ([R8_] * s) + disp32||[_SI] + ([R8_] * s) + disp32||[_DI] + ([R8_] * s) + disp32
|-
|-
! 1 !! b001
! 1 !! b001
|[RAX] + ([R9] * s) + disp32||[RCX] + ([R9] * s) + disp32||[RDX] + ([R9] * s) + disp32||[RBX] + ([R9] * s) + disp32||[RSP] + ([R9] * s) + disp32||[RBP] + ([R9] * s) + disp32||[RSI] + ([R9] * s) + disp32||[RDI] + ([R9] * s) + disp32
|[_AX] + ([R9_] * s) + disp32||[_CX] + ([R9_] * s) + disp32||[_DX] + ([R9_] * s) + disp32||[_BX] + ([R9_] * s) + disp32||[_SP] + ([R9_] * s) + disp32||[_BP] + ([R9_] * s) + disp32||[_SI] + ([R9_] * s) + disp32||[_DI] + ([R9_] * s) + disp32
|-
|-
! 1 !! b010
! 1 !! b010
|[RAX] + ([R10] * s) + disp32||[RCX] + ([R10] * s) + disp32||[RDX] + ([R10] * s) + disp32||[RBX] + ([R10] * s) + disp32||[RSP] + ([R10] * s) + disp32||[RBP] + ([R10] * s) + disp32||[RSI] + ([R10] * s) + disp32||[RDI] + ([R10] * s) + disp32
|[_AX] + ([R10_] * s) + disp32||[_CX] + ([R10_] * s) + disp32||[_DX] + ([R10_] * s) + disp32||[_BX] + ([R10_] * s) + disp32||[_SP] + ([R10_] * s) + disp32||[_BP] + ([R10_] * s) + disp32||[_SI] + ([R10_] * s) + disp32||[_DI] + ([R10_] * s) + disp32
|-
|-
! 1 !! b011
! 1 !! b011
|[RAX] + ([R11] * s) + disp32||[RCX] + ([R11] * s) + disp32||[RDX] + ([R11] * s) + disp32||[RBX] + ([R11] * s) + disp32||[RSP] + ([R11] * s) + disp32||[RBP] + ([R11] * s) + disp32||[RSI] + ([R11] * s) + disp32||[RDI] + ([R11] * s) + disp32
|[_AX] + ([R11_] * s) + disp32||[_CX] + ([R11_] * s) + disp32||[_DX] + ([R11_] * s) + disp32||[_BX] + ([R11_] * s) + disp32||[_SP] + ([R11_] * s) + disp32||[_BP] + ([R11_] * s) + disp32||[_SI] + ([R11_] * s) + disp32||[_DI] + ([R11_] * s) + disp32
|-
|-
! 1 !! b100
! 1 !! b100
|[RAX] + ([R12] * s) + disp32||[RCX] + ([R12] * s) + disp32||[RDX] + ([R12] * s) + disp32||[RBX] + ([R12] * s) + disp32||[RSP] + ([R12] * s) + disp32||[RBP] + ([R12] * s) + disp32||[RSI] + ([R12] * s) + disp32||[RDI] + ([R12] * s) + disp32
|[_AX] + ([R12_] * s) + disp32||[_CX] + ([R12_] * s) + disp32||[_DX] + ([R12_] * s) + disp32||[_BX] + ([R12_] * s) + disp32||[_SP] + ([R12_] * s) + disp32||[_BP] + ([R12_] * s) + disp32||[_SI] + ([R12_] * s) + disp32||[_DI] + ([R12_] * s) + disp32
|-
|-
! 1 !! b101
! 1 !! b101
|[RAX] + ([R13] * s) + disp32||[RCX] + ([R13] * s) + disp32||[RDX] + ([R13] * s) + disp32||[RBX] + ([R13] * s) + disp32||[RSP] + ([R13] * s) + disp32||[RBP] + ([R13] * s) + disp32||[RSI] + ([R13] * s) + disp32||[RDI] + ([R13] * s) + disp32
|[_AX] + ([R13_] * s) + disp32||[_CX] + ([R13_] * s) + disp32||[_DX] + ([R13_] * s) + disp32||[_BX] + ([R13_] * s) + disp32||[_SP] + ([R13_] * s) + disp32||[_BP] + ([R13_] * s) + disp32||[_SI] + ([R13_] * s) + disp32||[_DI] + ([R13_] * s) + disp32
|-
|-
! 1 !! b110
! 1 !! b110
|[RAX] + ([R14] * s) + disp32||[RCX] + ([R14] * s) + disp32||[RDX] + ([R14] * s) + disp32||[RBX] + ([R14] * s) + disp32||[RSP] + ([R14] * s) + disp32||[RBP] + ([R14] * s) + disp32||[RSI] + ([R14] * s) + disp32||[RDI] + ([R14] * s) + disp32
|[_AX] + ([R14_] * s) + disp32||[_CX] + ([R14_] * s) + disp32||[_DX] + ([R14_] * s) + disp32||[_BX] + ([R14_] * s) + disp32||[_SP] + ([R14_] * s) + disp32||[_BP] + ([R14_] * s) + disp32||[_SI] + ([R14_] * s) + disp32||[_DI] + ([R14_] * s) + disp32
|-
|-
! 1 !! b111
! 1 !! b111
|[RAX] + ([R15] * s) + disp32||[RCX] + ([R15] * s) + disp32||[RDX] + ([R15] * s) + disp32||[RBX] + ([R15] * s) + disp32||[RSP] + ([R15] * s) + disp32||[RBP] + ([R15] * s) + disp32||[RSI] + ([R15] * s) + disp32||[RDI] + ([R15] * s) + disp32
|[_AX] + ([R15_] * s) + disp32||[_CX] + ([R15_] * s) + disp32||[_DX] + ([R15_] * s) + disp32||[_BX] + ([R15_] * s) + disp32||[_SP] + ([R15_] * s) + disp32||[_BP] + ([R15_] * s) + disp32||[_SI] + ([R15_] * s) + disp32||[_DI] + ([R15_] * s) + disp32
|-
|-
| colspan="11" style="background-color: white; border-top: solid 2px black; border-bottom: solid 2px black; border-left: none; border-right: none;" |
| colspan="11" style="background-color: white; border-top: solid 2px black; border-bottom: solid 2px black; border-left: none; border-right: none;" |
Line 982: Line 982:
|-
|-
! rowspan="16" | b10 !! 0 !! b000
! rowspan="16" | b10 !! 0 !! b000
|[R8] + ([RAX] * s) + disp32||[R9] + ([RAX] * s) + disp32||[R10] + ([RAX] * s) + disp32||[R11] + ([RAX] * s) + disp32||[R12] + ([RAX] * s) + disp32||[R13] + ([RAX] * s) + disp32||[R14] + ([RAX] * s) + disp32||[R15] + ([RAX] * s) + disp32
|[R8_] + ([_AX] * s) + disp32||[R9_] + ([_AX] * s) + disp32||[R10_] + ([_AX] * s) + disp32||[R11_] + ([_AX] * s) + disp32||[R12_] + ([_AX] * s) + disp32||[R13_] + ([_AX] * s) + disp32||[R14_] + ([_AX] * s) + disp32||[R15_] + ([_AX] * s) + disp32
|-
|-
! 0 !! b001
! 0 !! b001
|[R8] + ([RCX] * s) + disp32||[R9] + ([RCX] * s) + disp32||[R10] + ([RCX] * s) + disp32||[R11] + ([RCX] * s) + disp32||[R12] + ([RCX] * s) + disp32||[R13] + ([RCX] * s) + disp32||[R14] + ([RCX] * s) + disp32||[R15] + ([RCX] * s) + disp32
|[R8_] + ([_CX] * s) + disp32||[R9_] + ([_CX] * s) + disp32||[R10_] + ([_CX] * s) + disp32||[R11_] + ([_CX] * s) + disp32||[R12_] + ([_CX] * s) + disp32||[R13_] + ([_CX] * s) + disp32||[R14_] + ([_CX] * s) + disp32||[R15_] + ([_CX] * s) + disp32
|-
|-
! 0 !! b010
! 0 !! b010
|[R8] + ([RDX] * s) + disp32||[R9] + ([RDX] * s) + disp32||[R10] + ([RDX] * s) + disp32||[R11] + ([RDX] * s) + disp32||[R12] + ([RDX] * s) + disp32||[R13] + ([RDX] * s) + disp32||[R14] + ([RDX] * s) + disp32||[R15] + ([RDX] * s) + disp32
|[R8_] + ([_DX] * s) + disp32||[R9_] + ([_DX] * s) + disp32||[R10_] + ([_DX] * s) + disp32||[R11_] + ([_DX] * s) + disp32||[R12_] + ([_DX] * s) + disp32||[R13_] + ([_DX] * s) + disp32||[R14_] + ([_DX] * s) + disp32||[R15_] + ([_DX] * s) + disp32
|-
|-
! 0 !! b011
! 0 !! b011
|[R8] + ([RBX] * s) + disp32||[R9] + ([RBX] * s) + disp32||[R10] + ([RBX] * s) + disp32||[R11] + ([RBX] * s) + disp32||[R12] + ([RBX] * s) + disp32||[R13] + ([RBX] * s) + disp32||[R14] + ([RBX] * s) + disp32||[R15] + ([RBX] * s) + disp32
|[R8_] + ([_BX] * s) + disp32||[R9_] + ([_BX] * s) + disp32||[R10_] + ([_BX] * s) + disp32||[R11_] + ([_BX] * s) + disp32||[R12_] + ([_BX] * s) + disp32||[R13_] + ([_BX] * s) + disp32||[R14_] + ([_BX] * s) + disp32||[R15_] + ([_BX] * s) + disp32
|-
|-
! 0 !! b100
! 0 !! b100
|[R8] + disp32||[R9] + disp32||[R10] + disp32||[R11] + disp32||[R12] + disp32||[R13] + disp32||[R14] + disp32||[R15] + disp32
|[R8_] + disp32||[R9_] + disp32||[R10_] + disp32||[R11_] + disp32||[R12_] + disp32||[R13_] + disp32||[R14_] + disp32||[R15_] + disp32
|-
|-
! 0 !! b101
! 0 !! b101
|[R8] + ([RBP] * s) + disp32||[R9] + ([RBP] * s) + disp32||[R10] + ([RBP] * s) + disp32||[R11] + ([RBP] * s) + disp32||[R12] + ([RBP] * s) + disp32||[R13] + ([RBP] * s) + disp32||[R14] + ([RBP] * s) + disp32||[R15] + ([RBP] * s) + disp32
|[R8_] + ([_BP] * s) + disp32||[R9_] + ([_BP] * s) + disp32||[R10_] + ([_BP] * s) + disp32||[R11_] + ([_BP] * s) + disp32||[R12_] + ([_BP] * s) + disp32||[R13_] + ([_BP] * s) + disp32||[R14_] + ([_BP] * s) + disp32||[R15_] + ([_BP] * s) + disp32
|-
|-
! 0 !! b110
! 0 !! b110
|[R8] + ([RSI] * s) + disp32||[R9] + ([RSI] * s) + disp32||[R10] + ([RSI] * s) + disp32||[R11] + ([RSI] * s) + disp32||[R12] + ([RSI] * s) + disp32||[R13] + ([RSI] * s) + disp32||[R14] + ([RSI] * s) + disp32||[R15] + ([RSI] * s) + disp32
|[R8_] + ([_SI] * s) + disp32||[R9_] + ([_SI] * s) + disp32||[R10_] + ([_SI] * s) + disp32||[R11_] + ([_SI] * s) + disp32||[R12_] + ([_SI] * s) + disp32||[R13_] + ([_SI] * s) + disp32||[R14_] + ([_SI] * s) + disp32||[R15_] + ([_SI] * s) + disp32
|-
|-
! 0 !! b111
! 0 !! b111
|[R8] + ([RDI] * s) + disp32||[R9] + ([RDI] * s) + disp32||[R10] + ([RDI] * s) + disp32||[R11] + ([RDI] * s) + disp32||[R12] + ([RDI] * s) + disp32||[R13] + ([RDI] * s) + disp32||[R14] + ([RDI] * s) + disp32||[R15] + ([RDI] * s) + disp32
|[R8_] + ([_DI] * s) + disp32||[R9_] + ([_DI] * s) + disp32||[R10_] + ([_DI] * s) + disp32||[R11_] + ([_DI] * s) + disp32||[R12_] + ([_DI] * s) + disp32||[R13_] + ([_DI] * s) + disp32||[R14_] + ([_DI] * s) + disp32||[R15_] + ([_DI] * s) + disp32
|-
|-
! 1 !! b000
! 1 !! b000
|[R8] + ([R8] * s) + disp32||[R9] + ([R8] * s) + disp32||[R10] + ([R8] * s) + disp32||[R11] + ([R8] * s) + disp32||[R12] + ([R8] * s) + disp32||[R13] + ([R8] * s) + disp32||[R14] + ([R8] * s) + disp32||[R15] + ([R8] * s) + disp32
|[R8_] + ([R8_] * s) + disp32||[R9_] + ([R8_] * s) + disp32||[R10_] + ([R8_] * s) + disp32||[R11_] + ([R8_] * s) + disp32||[R12_] + ([R8_] * s) + disp32||[R13_] + ([R8_] * s) + disp32||[R14_] + ([R8_] * s) + disp32||[R15_] + ([R8_] * s) + disp32
|-
|-
! 1 !! b001
! 1 !! b001
|[R8] + ([R9] * s) + disp32||[R9] + ([R9] * s) + disp32||[R10] + ([R9] * s) + disp32||[R11] + ([R9] * s) + disp32||[R12] + ([R9] * s) + disp32||[R13] + ([R9] * s) + disp32||[R14] + ([R9] * s) + disp32||[R15] + ([R9] * s) + disp32
|[R8_] + ([R9_] * s) + disp32||[R9_] + ([R9_] * s) + disp32||[R10_] + ([R9_] * s) + disp32||[R11_] + ([R9_] * s) + disp32||[R12_] + ([R9_] * s) + disp32||[R13_] + ([R9_] * s) + disp32||[R14_] + ([R9_] * s) + disp32||[R15_] + ([R9_] * s) + disp32
|-
|-
! 1 !! b010
! 1 !! b010
|[R8] + ([R10] * s) + disp32||[R9] + ([R10] * s) + disp32||[R10] + ([R10] * s) + disp32||[R11] + ([R10] * s) + disp32||[R12] + ([R10] * s) + disp32||[R13] + ([R10] * s) + disp32||[R14] + ([R10] * s) + disp32||[R15] + ([R10] * s) + disp32
|[R8_] + ([R10_] * s) + disp32||[R9_] + ([R10_] * s) + disp32||[R10_] + ([R10_] * s) + disp32||[R11_] + ([R10_] * s) + disp32||[R12_] + ([R10_] * s) + disp32||[R13_] + ([R10_] * s) + disp32||[R14_] + ([R10_] * s) + disp32||[R15_] + ([R10_] * s) + disp32
|-
|-
! 1 !! b011
! 1 !! b011
|[R8] + ([R11] * s) + disp32||[R9] + ([R11] * s) + disp32||[R10] + ([R11] * s) + disp32||[R11] + ([R11] * s) + disp32||[R12] + ([R11] * s) + disp32||[R13] + ([R11] * s) + disp32||[R14] + ([R11] * s) + disp32||[R15] + ([R11] * s) + disp32
|[R8_] + ([R11_] * s) + disp32||[R9_] + ([R11_] * s) + disp32||[R10_] + ([R11_] * s) + disp32||[R11_] + ([R11_] * s) + disp32||[R12_] + ([R11_] * s) + disp32||[R13_] + ([R11_] * s) + disp32||[R14_] + ([R11_] * s) + disp32||[R15_] + ([R11_] * s) + disp32
|-
|-
! 1 !! b100
! 1 !! b100
|[R8] + ([R12] * s) + disp32||[R9] + ([R12] * s) + disp32||[R10] + ([R12] * s) + disp32||[R11] + ([R12] * s) + disp32||[R12] + ([R12] * s) + disp32||[R13] + ([R12] * s) + disp32||[R14] + ([R12] * s) + disp32||[R15] + ([R12] * s) + disp32
|[R8_] + ([R12_] * s) + disp32||[R9_] + ([R12_] * s) + disp32||[R10_] + ([R12_] * s) + disp32||[R11_] + ([R12_] * s) + disp32||[R12_] + ([R12_] * s) + disp32||[R13_] + ([R12_] * s) + disp32||[R14_] + ([R12_] * s) + disp32||[R15_] + ([R12_] * s) + disp32
|-
|-
! 1 !! b101
! 1 !! b101
|[R8] + ([R13] * s) + disp32||[R9] + ([R13] * s) + disp32||[R10] + ([R13] * s) + disp32||[R11] + ([R13] * s) + disp32||[R12] + ([R13] * s) + disp32||[R13] + ([R13] * s) + disp32||[R14] + ([R13] * s) + disp32||[R15] + ([R13] * s) + disp32
|[R8_] + ([R13_] * s) + disp32||[R9_] + ([R13_] * s) + disp32||[R10_] + ([R13_] * s) + disp32||[R11_] + ([R13_] * s) + disp32||[R12_] + ([R13_] * s) + disp32||[R13_] + ([R13_] * s) + disp32||[R14_] + ([R13_] * s) + disp32||[R15_] + ([R13_] * s) + disp32
|-
|-
! 1 !! b110
! 1 !! b110
|[R8] + ([R14] * s) + disp32||[R9] + ([R14] * s) + disp32||[R10] + ([R14] * s) + disp32||[R11] + ([R14] * s) + disp32||[R12] + ([R14] * s) + disp32||[R13] + ([R14] * s) + disp32||[R14] + ([R14] * s) + disp32||[R15] + ([R14] * s) + disp32
|[R8_] + ([R14_] * s) + disp32||[R9_] + ([R14_] * s) + disp32||[R10_] + ([R14_] * s) + disp32||[R11_] + ([R14_] * s) + disp32||[R12_] + ([R14_] * s) + disp32||[R13_] + ([R14_] * s) + disp32||[R14_] + ([R14_] * s) + disp32||[R15_] + ([R14_] * s) + disp32
|-
|-
! 1 !! b111
! 1 !! b111
|[R8] + ([R15] * s) + disp32||[R9] + ([R15] * s) + disp32||[R10] + ([R15] * s) + disp32||[R11] + ([R15] * s) + disp32||[R12] + ([R15] * s) + disp32||[R13] + ([R15] * s) + disp32||[R14] + ([R15] * s) + disp32||[R15] + ([R15] * s) + disp32
|[R8_] + ([R15_] * s) + disp32||[R9_] + ([R15_] * s) + disp32||[R10_] + ([R15_] * s) + disp32||[R11_] + ([R15_] * s) + disp32||[R12_] + ([R15_] * s) + disp32||[R13_] + ([R15_] * s) + disp32||[R14_] + ([R15_] * s) + disp32||[R15_] + ([R15_] * s) + disp32
|}
|}
</div>
</div>
Retrieved from "https://osdev.wiki/wiki/X86-64_Instruction_Encoding"