X86-64 Instruction Encoding: Difference between revisions

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→‎Registers: Added YMM registers
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==== Registers ====
==== Registers ====
{| {{wikitable}}
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! REX.b,r,x!! Value!! 8-bit GP!! 16-bit GP!! 32-bit GP!! 64-bit GP!! 64-bit MMX!! 128-bit XMM!! 16-bit Seg. reg!! 32-bit Contr. reg!! 32-bit Debug. reg
! B,R or X!! Value!! 8-bit GP!! 16-bit GP!! 32-bit GP!! 64-bit GP!! 64-bit MMX!! 128-bit XMM!! 256-bit YMM!! 16-bit Segment!! 32-bit Control!! 32-bit Debug
|-
|-
| 0||0||AL||AX||EAX||RAX||MM0||XMM0||ES||CR0||DR0
| 0||0||AL||AX||EAX||RAX||MM0||XMM0||YMM0||ES||CR0||DR0
|-
|-
| 0||1||CL||CX||ECX||RCX||MM1||XMM1||CS||CR1||DR1
| 0||1||CL||CX||ECX||RCX||MM1||XMM1||YMM1||CS||CR1||DR1
|-
|-
| 0||2||DL||DX||EDX||RDX||MM2||XMM2||SS||CR2||DR2
| 0||2||DL||DX||EDX||RDX||MM2||XMM2||YMM2||SS||CR2||DR2
|-
|-
| 0||3||BL||BX||EBX||RBX||MM3||XMM3||DS||CR3||DR3
| 0||3||BL||BX||EBX||RBX||MM3||XMM3||YMM3||DS||CR3||DR3
|-
|-
| 0||4||AH, SPL<span style="vertical-align: super">[[#Table2Note1|1]]</span>||SP||ESP||RSP||MM4||XMM4||FS||CR4||DR4
| 0||4||AH, SPL<span style="vertical-align: super">[[#Table2Note1|1]]</span>||SP||ESP||RSP||MM4||XMM4||YMM4||FS||CR4||DR4
|-
|-
| 0||5||CH, BPL<span style="vertical-align: super">[[#Table2Note1|1]]</span>||BP||EBP||RBP||MM5||XMM5||GS||CR5||DR5
| 0||5||CH, BPL<span style="vertical-align: super">[[#Table2Note1|1]]</span>||BP||EBP||RBP||MM5||XMM5||YMM5||GS||CR5||DR5
|-
|-
| 0||6||DH, SIL<span style="vertical-align: super">[[#Table2Note1|1]]</span>||SI||ESI||RSI||MM6||XMM6||invalid||CR6||DR6
| 0||6||DH, SIL<span style="vertical-align: super">[[#Table2Note1|1]]</span>||SI||ESI||RSI||MM6||XMM6||YMM6||invalid||CR6||DR6
|-
|-
| 0||7||BH, DIL<span style="vertical-align: super">[[#Table2Note1|1]]</span>||DI||EDI||RDI||MM7||XMM7||invalid||CR7||DR7
| 0||7||BH, DIL<span style="vertical-align: super">[[#Table2Note1|1]]</span>||DI||EDI||RDI||MM7||XMM7||YMM7||invalid||CR7||DR7
|-
|-
| 1||0||R8L||R8W||R8D||R8||MM0||XMM8||ES||CR8||DR8
| 1||0||R8L||R8W||R8D||R8||MM0||XMM8||YMM8||ES||CR8||DR8
|-
|-
| 1||1||R9L||R9W||R9D||R9||MM1||XMM9||CS||CR9||DR9
| 1||1||R9L||R9W||R9D||R9||MM1||XMM9||YMM9||CS||CR9||DR9
|-
|-
| 1||2||R10L||R10W||R10D||R10||MM2||XMM10||SS||CR10||DR10
| 1||2||R10L||R10W||R10D||R10||MM2||XMM10||YMM10||SS||CR10||DR10
|-
|-
| 1||3||R11L||R11W||R11D||R11||MM3||XMM11||DS||CR11||DR11
| 1||3||R11L||R11W||R11D||R11||MM3||XMM11||YMM11||DS||CR11||DR11
|-
|-
| 1||4||R12L||R12W||R12D||R12||MM4||XMM12||FS||CR12||DR12
| 1||4||R12L||R12W||R12D||R12||MM4||XMM12||YMM12||FS||CR12||DR12
|-
|-
| 1||5||R13L||R13W||R13D||R13||MM5||XMM13||GS||CR13||DR13
| 1||5||R13L||R13W||R13D||R13||MM5||XMM13||YMM13||GS||CR13||DR13
|-
|-
| 1||6||R14L||R14W||R14D||R14||MM6||XMM14||invalid||CR14||DR14
| 1||6||R14L||R14W||R14D||R14||MM6||XMM14||YMM14||invalid||CR14||DR14
|-
|-
| 1||7||R15L||R15W||R15D||R15||MM7||XMM15||invalid||CR15||DR15
| 1||7||R15L||R15W||R15D||R15||MM7||XMM15||YMM15||invalid||CR15||DR15
|}
|}
<small id="Table2Note1">1: When any REX prefix is used, SPL, BPL, SIL and DIL are used. Otherwise, without any REX prefix AH, CH, DH and BH are used.</small>
<small id="Table2Note1">1: When any REX prefix is used, SPL, BPL, SIL and DIL are used. Otherwise, without any REX prefix AH, CH, DH and BH are used.</small>