User:Lionel/MSR Draft: Difference between revisions

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{| class="wikitable sortable"
{| class="wikitable sortable"
|-
|-
! MSR
! MSR Number
! MSR Name
! Address
! Vendor
! Access
! Originator
⚫
! class="unsortable" | Bit / Description
! class="unsortable" | Comments.
! class="unsortable" | Description/Comments
⚫
! class="unsortable" | Availability
|-
|-
| 0x00000000
| IA32_P5_MC_ADDR (P5_MC_ADDR)
| IA32_P5_MC_ADDR (P5_MC_ADDR)
| 0x0
|
| Intel
| Intel
| See Section 35.20 of Intel Architecture Manual 3c, “MSRs in Pentium Processors.”
| See Section 35.20 of Intel Architecture Manual 3c, “MSRs in Pentium Processors.”
|
| Pentium Processor (05_01H)
; Intel: Family = 05 Model >= 1
|-
|-
| 0x0000001B
| IA32_APIC_BASE (APIC_BASE)
| IA32_APIC_BASE (APIC_BASE)
| 0x1B
|
| Intel / AMD
| Intel
| See Intel Architecture Manual 3c.
| See Intel Architecture Manual 3c.
|
| Intel Family 06 Model 1 and after support this.
; Intel : Family = 06 Model = 1 and newer<br />Others!
; AMD : Unknown
|-
|-
| 0x0000003A
| IA32_FEATURE_CONTROL
| IA32_FEATURE_CONTROL
| Read/Write
| 0x3A
| Intel
| Intel
| Control Features in Intel 64 Processor (R/W)
| Control CPU Features
|
| If CPUID.01H: ECX[bit 5 or bit 6] = 1
;All: If CPUID.01H: ECX[bit 5 or bit 6] = 1
|-
|-
| 0x000000FF

| IA32_SAMPLE_AMD
| IA32_SAMPLE_AMD
| 0xFF
|
| AMD
| AMD
| N/A
| N/A
|
| N/A
; AMD: Unknown
|-
|-
| 0x00001107

| FCR
| FCR
⚫
|
| ecx: 1107h, eax: FCRValue
| VIA
| VIA
⚫
| R/W Feature Control Register, eax = FCRValue
⚫
| RW
|
| Feature Control Register
; VIA: Unknown
|-
|-
| 0x00001108
| FCR2
| FCR2
| Read/Write
⚫
| ecx: 1108h, edx: FCR2_Hi, eax: FCRValue
| VIA
| VIA
⚫
| RW Feature Control Register 2, edx = FCR2_Hi, eax = FCRValue
| RW
|
⚫
| Feature Control Register 2
; VIA: Unknown
|-
|-
| 0x00001109
| FCR3
| FCR3
| Write Only
⚫
| ecx: 1109h, edx: FCR3_Hi, eax: FCRValue
| VIA
| VIA
⚫
| Feature Control Register 3, edx = FCR3_Hi, eax = FCRValue
| WO
|
| Feature Control Register 3
; VIA: Unknown
|}
|}

Revision as of 17:36, 23 May 2015

A prototype of a list of MSR's, lifted straight from the manual.


MSR's

MSR Number MSR Name Access Originator Description/Comments Availability
0x00000000 IA32_P5_MC_ADDR (P5_MC_ADDR) Intel See Section 35.20 of Intel Architecture Manual 3c, “MSRs in Pentium Processors.”
Intel
Family = 05 Model >= 1
0x0000001B IA32_APIC_BASE (APIC_BASE) Intel See Intel Architecture Manual 3c.
Intel
Family = 06 Model = 1 and newer
Others!
AMD
Unknown
0x0000003A IA32_FEATURE_CONTROL Read/Write Intel Control CPU Features
All
If CPUID.01H: ECX[bit 5 or bit 6] = 1
0x000000FF IA32_SAMPLE_AMD AMD N/A
AMD
Unknown
0x00001107 FCR VIA R/W Feature Control Register, eax = FCRValue
VIA
Unknown
0x00001108 FCR2 Read/Write VIA RW Feature Control Register 2, edx = FCR2_Hi, eax = FCRValue
VIA
Unknown
0x00001109 FCR3 Write Only VIA Feature Control Register 3, edx = FCR3_Hi, eax = FCRValue
VIA
Unknown
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