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== GeneralMSR's ==
 
{| class="wikitable sortable"
|-
! MSR
! Address
! Vendor
! Bit \/ Description
! Comments.
|-
| IA32_P5_MC_ADDR (P5_MC_ADDR)
| 0x0
| Intel
| See Section 35.20 of Intel Architecture Manual 3c, “MSRs in Pentium Processors.”
| Pentium Processor (05_01H)
Line 19 ⟶ 21:
| IA32_APIC_BASE (APIC_BASE)
| 0x1B
| Intel / AMD
| See Intel Architecture Manual 3c.
| Intel Family 06 Model 1 and after support this.
|}
 
== Intel Specific ==
 
{| class="wikitable"
|-
! MSR
! Address
! Bit \ Description
! Comments.
|-
| IA32_FEATURE_CONTROL
| 0x3A
| Intel
| Control Features in Intel 64 Processor (R/W)
| If CPUID.01H: ECX[bit 5 or bit 6] = 1
|}-
 
| IA32_SAMPLE_AMD
== AMD Specific ==
| 0xFF
 
| AMD
{| class="wikitable"
| N/A
| N/A
|-
! MSR
! Address
! Bit Description
! Purpose
|}
 
| IA32_SAMPLE_VIA
== VIA Specific ==
| 0xFE
 
| VIA
{| class="wikitable"
| N/A
|-
| N/A
! MSR
! Address
! Bit Description
! Purpose
|}
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