Universal Host Controller Interface: Difference between revisions

From OSDev.wiki
Jump to navigation Jump to search
[unchecked revision][unchecked revision]
Content added Content deleted
No edit summary
No edit summary
Line 17: Line 17:
| 02 || USBSTS || Usb Status
| 02 || USBSTS || Usb Status
|-
|-
| 00 || USBINTR || Usb Interrupt Enable
| 04 || USBINTR || Usb Interrupt Enable
|-
|-
| 00 || FRNUM || Frame Number
| 06 || FRNUM || Frame Number
|-
|-
| 00 || FRBASEADD || Frame List Base Address
| 08 || FRBASEADD || Frame List Base Address
|-
|-
| 00 || SOFMOD|| Start Of Frame Modify
| 0C || SOFMOD|| Start Of Frame Modify
|-
|-
| 00 || PORTSC1 || Port 1 Status/Control
| 10 || PORTSC1 || Port 1 Status/Control
|-
|-
| 00 || PORTSC2 || Port 2 Status/Control
| 12 || PORTSC2 || Port 2 Status/Control
|-
|-
|}
|}

Revision as of 17:19, 12 January 2013

Universal Host Controller Interface (UHCI) was created by Intel as an implementation of the USB 1.0 host controller interface. Along with OHCI, it makes up the USB 1.0 standard.

Technical Details

The UHCI specification defines a set of I/O mapped registers that allow communication between the controller and the operating system. The base address for these registers can be found by searching the PCI controller for a specific VendorID/DeviceID combination, or for a specific ClassID/SubclassID/Interface combination. All UHCI PCI controllers will have a Class ID of 0x0C, a Subclass ID of 0x03, and an Interface value of 0x00. The PCI Configuration space for this device will contain the I/O port address information in BAR0.

I/O Registers

Offset (Hex) Name Description
00 USBCMD Usb Command
02 USBSTS Usb Status
04 USBINTR Usb Interrupt Enable
06 FRNUM Frame Number
08 FRBASEADD Frame List Base Address
0C SOFMOD Start Of Frame Modify
10 PORTSC1 Port 1 Status/Control
12 PORTSC2 Port 2 Status/Control