Intel Ethernet i217: Difference between revisions
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#define TSTA_LC (1 << 2) // Late Collision |
#define TSTA_LC (1 << 2) // Late Collision |
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#define LSTA_TU (1 << 3) // Transmit Underrun |
#define LSTA_TU (1 << 3) // Transmit Underrun |
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</source> |
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Now lets define the data structures for the transmit and receive buffers |
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<source lang="c"> |
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#define E1000_NUM_RX_DESC 32 |
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#define E1000_NUM_TX_DESC 8 |
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struct e1000_rx_desc { |
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volatile uint64_t addr; |
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volatile uint16_t length; |
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volatile uint16_t checksum; |
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volatile uint8_t status; |
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volatile uint8_t errors; |
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volatile uint16_t special; |
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} __attribute__((packed)); |
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struct e1000_tx_desc { |
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volatile uint64_t addr; |
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volatile uint16_t length; |
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volatile uint8_t cso; |
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volatile uint8_t cmd; |
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volatile uint8_t status; |
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volatile uint8_t css; |
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volatile uint16_t special; |
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} __attribute__((packed)); |
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</source> |
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And finally some helper macros for MMIO read/write operations |
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<source lang="c"> |
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#define mmio_read32(p) (*((volatile uint32_t*)(p))) |
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#define mmio_write32(p,v) ((*((volatile uint32_t*)(p)))=(v)) |
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#define mmio_read16(p) (*((volatile uint16_t*)(p))) |
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#define mmio_write16(p,v) ((*((volatile uint16_t*)(p)))=(v)) |
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#define mmio_read8(p) (*((volatile uint8_t*)(p))) |
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#define mmio_write8(p,v) ((*((volatile uint8_t*)(p)))=(v)) |
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</source> |
</source> |
Revision as of 13:04, 18 April 2015
Network Driver for Intel Ethernet Cards I217 and 82577LM
I am writing this Wiki as a demonstration of my own experience of getting a working driver for the Intel I217 and 82577LM network cards to work, on a real native bare metal hardware, namely Thinkpads W540 and W510. Linux uses the e1000e network driver for those cards. I have started from a working e1000 driver that I have developed for my OS and which is operational on Qemu, Bochs, and VirtualBox. The main objective of this Wiki is to try to highlight the differences and the addition needed on an operations e1000 driver to work handle network cards that work with the e1000e. So the provided knowledge in this wiki might be applicable on other Intel interfaces. For completion, I will present in this wiki my e1000 driver with the additions that made it work on those native NICs, I217 and 82577LM. I built my original e1000 driver based on information from OSDev and some hobby operating systems on github.
Card Addresses and Data Structures
To start with, lets state some macro definitions that we are going to use in the code.
#define INTEL_VEND 0x8086 // Vendor ID for Intel
#define E1000_DEV 0x100E // Device ID for the e1000 Qemu, Bochs, and VirtualBox emmulated NICs
#define E1000_DEV1 0x153A // Device ID for Intel I217
#define E1000_DEV2 0x10EA // Device ID for Intel 82577LM
// I have gathered those from different Hobby online operating systems instead of getting them one by one from the manual
#define REG_CTRL 0x0000
#define REG_STATUS 0x0008
#define REG_EEPROM 0x0014
#define REG_CTRL_EXT 0x0018
#define REG_IMASK 0x00D0
#define REG_RCTRL 0x0100
#define REG_RXDESCLO 0x2800
#define REG_RXDESCHI 0x2804
#define REG_RXDESCLEN 0x2808
#define REG_RXDESCHEAD 0x2810
#define REG_RXDESCTAIL 0x2818
#define REG_TCTRL 0x0400
#define REG_TXDESCLO 0x3800
#define REG_TXDESCHI 0x3804
#define REG_TXDESCLEN 0x3808
#define REG_TXDESCHEAD 0x3810
#define REG_TXDESCTAIL 0x3818
#define REG_RDTR 0x2820 // RX Delay Timer Register
#define REG_RXDCTL 0x3828 // RX Descriptor Control
#define REG_RADV 0x282C // RX Int. Absolute Delay Timer
#define REG_RSRPD 0x2C00 // RX Small Packet Detect Interrupt
#define REG_TIPG 0x0410 // Transmit Inter Packet Gap
#define ECTRL_SLU 0x40 //set link up
#define RCTL_EN (1 << 1) // Receiver Enable
#define RCTL_SBP (1 << 2) // Store Bad Packets
#define RCTL_UPE (1 << 3) // Unicast Promiscuous Enabled
#define RCTL_MPE (1 << 4) // Multicast Promiscuous Enabled
#define RCTL_LPE (1 << 5) // Long Packet Reception Enable
#define RCTL_LBM_NONE (0 << 6) // No Loopback
#define RCTL_LBM_PHY (3 << 6) // PHY or external SerDesc loopback
#define RTCL_RDMTS_HALF (0 << 8) // Free Buffer Threshold is 1/2 of RDLEN
#define RTCL_RDMTS_QUARTER (1 << 8) // Free Buffer Threshold is 1/4 of RDLEN
#define RTCL_RDMTS_EIGHTH (2 << 8) // Free Buffer Threshold is 1/8 of RDLEN
#define RCTL_MO_36 (0 << 12) // Multicast Offset - bits 47:36
#define RCTL_MO_35 (1 << 12) // Multicast Offset - bits 46:35
#define RCTL_MO_34 (2 << 12) // Multicast Offset - bits 45:34
#define RCTL_MO_32 (3 << 12) // Multicast Offset - bits 43:32
#define RCTL_BAM (1 << 15) // Broadcast Accept Mode
#define RCTL_VFE (1 << 18) // VLAN Filter Enable
#define RCTL_CFIEN (1 << 19) // Canonical Form Indicator Enable
#define RCTL_CFI (1 << 20) // Canonical Form Indicator Bit Value
#define RCTL_DPF (1 << 22) // Discard Pause Frames
#define RCTL_PMCF (1 << 23) // Pass MAC Control Frames
#define RCTL_SECRC (1 << 26) // Strip Ethernet CRC
// Buffer Sizes
#define RCTL_BSIZE_256 (3 << 16)
#define RCTL_BSIZE_512 (2 << 16)
#define RCTL_BSIZE_1024 (1 << 16)
#define RCTL_BSIZE_2048 (0 << 16)
#define RCTL_BSIZE_4096 ((3 << 16) | (1 << 25))
#define RCTL_BSIZE_8192 ((2 << 16) | (1 << 25))
#define RCTL_BSIZE_16384 ((1 << 16) | (1 << 25))
// Transmit Command
#define CMD_EOP (1 << 0) // End of Packet
#define CMD_IFCS (1 << 1) // Insert FCS
#define CMD_IC (1 << 2) // Insert Checksum
#define CMD_RS (1 << 3) // Report Status
#define CMD_RPS (1 << 4) // Report Packet Sent
#define CMD_VLE (1 << 6) // VLAN Packet Enable
#define CMD_IDE (1 << 7) // Interrupt Delay Enable
// TCTL Register
#define TCTL_EN (1 << 1) // Transmit Enable
#define TCTL_PSP (1 << 3) // Pad Short Packets
#define TCTL_CT_SHIFT 4 // Collision Threshold
#define TCTL_COLD_SHIFT 12 // Collision Distance
#define TCTL_SWXOFF (1 << 22) // Software XOFF Transmission
#define TCTL_RTLC (1 << 24) // Re-transmit on Late Collision
#define TSTA_DD (1 << 0) // Descriptor Done
#define TSTA_EC (1 << 1) // Excess Collisions
#define TSTA_LC (1 << 2) // Late Collision
#define LSTA_TU (1 << 3) // Transmit Underrun
Now lets define the data structures for the transmit and receive buffers
#define E1000_NUM_RX_DESC 32
#define E1000_NUM_TX_DESC 8
struct e1000_rx_desc {
volatile uint64_t addr;
volatile uint16_t length;
volatile uint16_t checksum;
volatile uint8_t status;
volatile uint8_t errors;
volatile uint16_t special;
} __attribute__((packed));
struct e1000_tx_desc {
volatile uint64_t addr;
volatile uint16_t length;
volatile uint8_t cso;
volatile uint8_t cmd;
volatile uint8_t status;
volatile uint8_t css;
volatile uint16_t special;
} __attribute__((packed));
And finally some helper macros for MMIO read/write operations
#define mmio_read32(p) (*((volatile uint32_t*)(p)))
#define mmio_write32(p,v) ((*((volatile uint32_t*)(p)))=(v))
#define mmio_read16(p) (*((volatile uint16_t*)(p)))
#define mmio_write16(p,v) ((*((volatile uint16_t*)(p)))=(v))
#define mmio_read8(p) (*((volatile uint8_t*)(p)))
#define mmio_write8(p,v) ((*((volatile uint8_t*)(p)))=(v))