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PCI: Difference between revisions
Re-word section about I/O APIC
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(Refactor I/O APIC routing section to remove unnecessary / redundant info) |
(Re-word section about I/O APIC) |
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If you're using the old [[PIC]], your life is really easy. You have the ''Interrupt Line'' field of the header, which is read/write (you can change it's value!) and it says which interrupt will the PCI device fire when it needs attention.
If you plan to use the [[I/O APIC]], things aren't so easy. Basically the PCI bus specifies that their are 4 interrupt pins. They are labeled INTA#, INTB#, INTC#, and INTD#. You find out what pin a device is using by reading the ''Interrupt Pin'' field of the header. So far, so good. The only problem is that the PCI pins don't correspond to
Alternatively, you could just use MSI or MSI-X, and skip
== Message Signaled Interrupts ==
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