PCI: Difference between revisions

155 bytes added ,  1 year ago
Re-word section about I/O APIC
[unchecked revision][unchecked revision]
(Refactor I/O APIC routing section to remove unnecessary / redundant info)
(Re-word section about I/O APIC)
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If you're using the old [[PIC]], your life is really easy. You have the ''Interrupt Line'' field of the header, which is read/write (you can change it's value!) and it says which interrupt will the PCI device fire when it needs attention.
 
If you plan to use the [[I/O APIC]], things aren't so easy. Basically the PCI bus specifies that their are 4 interrupt pins. They are labeled INTA#, INTB#, INTC#, and INTD#. You find out what pin a device is using by reading the ''Interrupt Pin'' field of the header. So far, so good. The only problem is that the PCI pins don't correspond to anyan particulararbitrary I/O APIC pin. It's up to the progammer to find the mapping. How is that done? You must parse the [[MP]] Tables or the [[ACPI]] tables. The MP tables are easy, only they aren't supported on newer hardware. The ACPI tables, however, involve parsing AML, which is not an easy task. If one wants to take a shortcut, you can use [[ACPICA]]. Once you've found the I/O APIC pin, all you do is map that to an IRQ using the I/O APIC redirection table. See the [[I/O APIC]] article for more information on this.
 
Alternatively, you could just use MSI or MSI-X, and skip all that nastycomplicated ACPI stuff.
 
== Message Signaled Interrupts ==
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