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On the [[x86]] architecture, the '''Interrupt Vector Table (IVT)''' is a table that specifies the addresses of all the 256 interrupt handlers used in [[real mode]]. Although it is also called the IDT, it usually goes by the name of IVT to avoid confusions related to the protected mode [[interrupt descriptor table]] - they are quite different.
On the [[x86]] architecture, the '''Interrupt Vector Table (IVT)''' is a table that specifies the addresses of all the 256 interrupt handlers used in [[real mode]]. Although it is also called the IDT, it usually goes by the name of IVT to avoid confusions related with the protected mode [[Interrupt Descriptor Table]].


The IVT is the only data structure that is needed by the CPU in real mode. However, if one takes the whole system into account, there are other equally important structures, such as the BDA and the EBDA. It is typically located at 0000:0000H, and is 400H bytes in size (4 bytes for each interrupt). Although the default address can be changed using the LIDT instruction on newer CPUs, this is usually not done because it is both inconvenient and incompatible with other implementations and/or older software (e.g. MS-DOS programs). However, note that the code must remain in the first MiB of RAM.
The IVT is typically located at 0000:0000H, and is 400H bytes in size (4 bytes for each interrupt). Although the default address can be changed using the LIDT instruction on newer CPUs, this is usually not done because it is both inconvenient and incompatible with other implementations and/or older software (e.g. MS-DOS programs). However, note that the code must remain in the first MiB of RAM.


== Structure ==
== Structure ==


The 4-byte entries are consecutive, meaning the first entry pointed by the IDTR is interrupt handler 0, and the others follow in succession. The format of an entry is:
The entries are consecutive, meaning the first entry pointed by the IDTR is interrupt handler 0, and the others follow in succession. The format of an entry is:


+-----------+-----------+
+-----------+-----------+

Revision as of 18:28, 8 February 2009

On the x86 architecture, the Interrupt Vector Table (IVT) is a table that specifies the addresses of all the 256 interrupt handlers used in real mode. Although it is also called the IDT, it usually goes by the name of IVT to avoid confusions related with the protected mode Interrupt Descriptor Table.

The IVT is typically located at 0000:0000H, and is 400H bytes in size (4 bytes for each interrupt). Although the default address can be changed using the LIDT instruction on newer CPUs, this is usually not done because it is both inconvenient and incompatible with other implementations and/or older software (e.g. MS-DOS programs). However, note that the code must remain in the first MiB of RAM.

Structure

The entries are consecutive, meaning the first entry pointed by the IDTR is interrupt handler 0, and the others follow in succession. The format of an entry is:

 +-----------+-----------+
 |  Segment  |  Offset   |
 +-----------+-----------+
 4           2           0

We can therefore see that it's really easy to get the address of the interrupt handler we're looking for: IDTR * 4. In order to change an interrupt handler, all that needs to be done is to change its address in the table.

See also