Interrupt Vector Table: Difference between revisions

From OSDev.wiki
Jump to navigation Jump to search
[unchecked revision][unchecked revision]
Content deleted Content added
creating page
 
No edit summary
Line 28: Line 28:
{{Stub}}
{{Stub}}


[[Category:Real Mode]]
[[Category:X86 CPU]]

Revision as of 22:55, 14 February 2007

The Interrupt Vector Table (IVT) is specific for the X86 architecture. It contains segment:offset pairs to all 256 interrupts. For I386 or newer architectures it is still used in real mode.

Structure

The IVT is located at memory address 0x0. It contains 256 4-byte entries. Every entry has this structure:

Byte:
       +---------------+---------------+
   0   |             Offset            |
       +---------------+---------------+

       +---------------+---------------+
   2   |            Segment            |
       +---------------+---------------+

When you in real mode execute an INT 0x10 assembly instruction, the CPU will look up entry 0x10 (located at 0x10 * 4) and jump to specified segment:offset.

Newer architectures

Newer architectures, since I386, can be in protected mode. Then you have to use an Interrupt Descriptor Table (note the name difference), which is the IVT counterpart in protected mode.

See also

This page is a stub.
You can help the wiki by accurately adding more contents to it.