User:Lionel/MSR Draft: Difference between revisions
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m Sorry to edit your user page, but EFER is such a notable MSR... |
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; VIA: Unknown |
; VIA: Unknown |
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| 0xC0000080 |
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| EFER |
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| Read/Write |
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| AMD |
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| Extended Features Enable Register - notably long mode |
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; AMD: introduced with K6 CPU. Introduced for syscall/sysret enabling. |
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Latest revision as of 12:11, 17 January 2016
A prototype of a list of MSR's, lifted straight from the manual.
MSR's
MSR Number | MSR Name | Access | Originator | Description/Comments | Availability |
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0x00000000 | IA32_P5_MC_ADDR (P5_MC_ADDR) | Intel | See Section 35.20 of Intel Architecture Manual 3c, “MSRs in Pentium Processors.” |
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0x0000001B | IA32_APIC_BASE (APIC_BASE) | Intel | See Intel Architecture Manual 3c. |
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0x0000003A | IA32_FEATURE_CONTROL | Read/Write | Intel | Control CPU Features |
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0x000000FF | IA32_SAMPLE_AMD | AMD | N/A |
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0x00001107 | FCR | VIA | R/W Feature Control Register, eax = FCRValue |
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0x00001108 | FCR2 | Read/Write | VIA | RW Feature Control Register 2, edx = FCR2_Hi, eax = FCRValue |
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0x00001109 | FCR3 | Write Only | VIA | Feature Control Register 3, edx = FCR3_Hi, eax = FCRValue |
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0xC0000080 | EFER | Read/Write | AMD | Extended Features Enable Register - notably long mode |
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