Sparc Hardware Docs: Difference between revisions

Jump to navigation Jump to search
[unchecked revision][unchecked revision]
Content deleted Content added
No edit summary
Line 17: Line 17:




Sparc specific documentation note that the Z8530 is controlled through a an Sbus to Ebus bridge via the slave I/O controller and is not programmed directly refer to the system manuals. EBus is a slow 8 bit peripheral bus.
Note that on SparcStations, the Z8530 is controlled through a an Sbus to Ebus bridge via the slave I/O controller and is not programmed directly refer to the system manuals. EBus is a slow 8 bit peripheral bus.


The Slavio chip controls serial, nvram, TOD clock etc.
The Slavio chip controls serial, nvram, TOD clock etc.