RTL8139: Difference between revisions

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the reset. If the RST bit is high (1), then the reset is still in operation.
the reset. If the RST bit is high (1), then the reset is still in operation.


==Init Recieve buffer==
==Init Receive buffer==


For this part, we will send the chip a memory location to use as its recieve buffer start
For this part, we will send the chip a memory location to use as its receive buffer start
location. One way to do it, would be to define a buffer variable and send
location. One way to do it, would be to define a buffer variable and send
that variables memory location to the RBSTART register (0x30).
that variables memory location to the RBSTART register (0x30).
Line 32: Line 32:
The Interrupt Mask Register (IMR) and Interrupt Service Register (ISR) are responsible
The Interrupt Mask Register (IMR) and Interrupt Service Register (ISR) are responsible
for firing up different IRQs. The IMR bits line up with the ISR bits to work in sync.
for firing up different IRQs. The IMR bits line up with the ISR bits to work in sync.
If an IMR bit is low, then the corrosponding ISR bit with never fire an IRQ when the
If an IMR bit is low, then the corresponding ISR bit with never fire an IRQ when the
time comes for it to happen. The IMR is located at 0x3C and the ISR is located at 0x3E.
time comes for it to happen. The IMR is located at 0x3C and the ISR is located at 0x3E.


To set the RTL8139 to accept only the Transmit OK (TOK) and Recieve OK (ROK) interrupts,
To set the RTL8139 to accept only the Transmit OK (TOK) and Receive OK (ROK) interrupts,
we would have the TOK and ROK bits of the IMR high and leave the rest low. That way when
we would have the TOK and ROK bits of the IMR high and leave the rest low. That way when
a TOK or ROK IRQ happens, it actually will go through and fire up an IRQ.
a TOK or ROK IRQ happens, it actually will go through and fire up an IRQ.
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outportw(0x3C, 0x0005); // Sets the TOK and ROK bits high
outportw(0x3C, 0x0005); // Sets the TOK and ROK bits high


==Enable Recieve and Transmitter==
==Enable Receive and Transmitter==


Now is the time to start up the RX and TX functions.
Now is the time to start up the RX and TX functions.
This is quite an easy peice, and should (in my opinion) only be done after all of the
This is quite an easy piece, and should (in my opinion) only be done after all of the
configurations to the RTL8139's registers have been set to what is desired. The
configurations to the RTL8139's registers have been set to what is desired. The
RE (Reciever Enabled) and the TE (Transmitter Enabled) bits are located in the Command
RE (Receiver Enabled) and the TE (Transmitter Enabled) bits are located in the Command
Register (0x37). Starting up the RE and TE is pretty straight-forward, but lets go
Register (0x37). Starting up the RE and TE is pretty straight-forward, but lets go
through it anyways.
through it anyways.

Revision as of 04:23, 2 November 2007

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The RTL8139 Network Chip is used on many old Ethernet Network Devices. It supports 10 and 100 MBit.

Turning on the RTL8139

Send 0x00 to the CONFIG_1 register (0x52) to set the LWAKE + LWPTN to active high. this should essentially *power on* the device.

Software Reset!

Next, we should do a software reset to clear the RX and TX buffers and set everything back to defaults. Do this to eliminate the possibility of there still being garbage left in the buffers or registers on power on.

Sending 0x10 to the Command register (0x37) will send the RTL8139 into a software reset. Once that byte is sent, the RST bit must be checked to make sure that the chip has finished the reset. If the RST bit is high (1), then the reset is still in operation.

Init Receive buffer

For this part, we will send the chip a memory location to use as its receive buffer start location. One way to do it, would be to define a buffer variable and send that variables memory location to the RBSTART register (0x30).

ex: 

char rx_buffer[8192+16]; // declare the local buffer space (8k + header)
outportd(0x30, (unsigned long)rx_buffer); // send dword memory location to RBSTART (0x30)

Set IMR + ISR

The Interrupt Mask Register (IMR) and Interrupt Service Register (ISR) are responsible for firing up different IRQs. The IMR bits line up with the ISR bits to work in sync. If an IMR bit is low, then the corresponding ISR bit with never fire an IRQ when the time comes for it to happen. The IMR is located at 0x3C and the ISR is located at 0x3E.

To set the RTL8139 to accept only the Transmit OK (TOK) and Receive OK (ROK) interrupts, we would have the TOK and ROK bits of the IMR high and leave the rest low. That way when a TOK or ROK IRQ happens, it actually will go through and fire up an IRQ.

ex: 

outportw(0x3C, 0x0005); // Sets the TOK and ROK bits high

Enable Receive and Transmitter

Now is the time to start up the RX and TX functions. This is quite an easy piece, and should (in my opinion) only be done after all of the configurations to the RTL8139's registers have been set to what is desired. The RE (Receiver Enabled) and the TE (Transmitter Enabled) bits are located in the Command Register (0x37). Starting up the RE and TE is pretty straight-forward, but lets go through it anyways.

To enable the RTL8139 to accept and transmit packets, the RE and TE bits must go high. Once this is completed, then the card will start allowing packets in and/or out.

ex: 

outportb(0x37, 0x0C); // Sets the RE and TE bits high

External Links

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