RISC-V Meaty Skeleton with QEMU virt board: Difference between revisions
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Also note that this example RISC-V OS runs in M-mode usually reserved for firmware, rather than the S-mode recommended for RISC-V supervisors (OSes). If you wish to follow the RISC-V conventions closely, you may want to look into RISC-V privilege modes and [https://github.com/riscv-software-src/opensbi OpenSBI] early on and port your OS kernel accordingly. More information about RISC-V privilege modes available on [[RISC-V#Privileges|our wiki]]. |
Also note that this example RISC-V OS runs in M-mode usually reserved for firmware, rather than the S-mode recommended for RISC-V supervisors (OSes). If you wish to follow the RISC-V conventions closely, you may want to look into RISC-V privilege modes and [https://github.com/riscv-software-src/opensbi OpenSBI] early on and port your OS kernel accordingly. More information about RISC-V privilege modes available on [[RISC-V#Privileges|our wiki]]. |
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==See also== |
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* [[RISC-V|RISC-V]] |
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* [[RISC-V_Bare_Bones|RISC-V Bare Bones]] |
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* [[HiFive-1_Bare_Bones|HiFive-1 Bare Bones]] |
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* [[Meaty_Skeleton|Meaty Skeleton]] |
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