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For memory efficiency, two or more processes can share pages as read-only. If one process were to write to its page, then a page fault would occur and the system could duplicate the page and then mark it as read-write. This is known as copy-on-write (COW). Copy-on-write allows the system to delay memory allocation until a process actually requires it, preventing unnecessary copying. |
For memory efficiency, two or more processes can share pages as read-only. If one process were to write to its page, then a page fault would occur and the system could duplicate the page and then mark it as read-write. This is known as copy-on-write (COW). Copy-on-write allows the system to delay memory allocation until a process actually requires it, preventing unnecessary copying. |
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== PAT == |
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The Page Attribute Table determines caching attributes on a page granularity. This is similar to [[MTRR]]s, but those apply to physical addresses and are more limited. |
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The PAT is set via the IA32_PAT_MSR [[MSR]] (0x277). It has 8 entries, taking the low order 3 bits of each byte, in standard little endian order. So the high byte is PAT7, low byte is PAT0. |
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The following are the different caching types. |
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{| class="wikitable" border="1" |
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|- |
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! Number |
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! Name |
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! Description |
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|- |
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| 0 |
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| UC — Uncacheable |
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| All accesses are uncacheable. Write combining is not allowed. Speculative accesses are not allowed. |
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|- |
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| 1 |
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| WC — Write-Combining |
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| All accesses are uncacheable. Write combining is allowed. Speculative reads are allowed. |
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|- |
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| 4 |
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| WT — Writethrough |
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| Reads allocate cache lines on a cache miss. Cache lines are not allocated on a write miss. |
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Write hits update the cache and main memory. |
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|- |
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| 5 |
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| WP — Write-Protect |
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| Reads allocate cache lines on a cache miss. All writes update main memory. |
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Cache lines are not allocated on a write miss. Write hits invalidate the cache |
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line and update main memory. |
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|- |
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| 6 |
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| WB — Writeback |
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| Reads allocate cache lines on a cache miss, and can allocate to either the shared, |
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exclusive, or modified state. Writes allocate to the modified state on a cache miss. |
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|- |
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| 7 |
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| UC- — Uncached |
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| Same as uncacheable, ''except'' that this can be overriden by Write-Combining MTRRs. |
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|} |
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The PAT has a reset value of 0x0007040600070406. This ensures compatibility with non-PAT usage. This corresponds to the following: |
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{| class="wikitable" border="1" |
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|- |
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|UC |
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|UC- |
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|WT |
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|WB |
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|UC |
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|UC- |
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|WT |
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|WB |
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|} |
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The PAT is indexed by the three page table bits: |
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{| class="wikitable" border="1" |
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|- |
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|PAT |
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|PCD |
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|PWT |
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|} |
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The PAT bit is reserved when there isn't a PAT, and the default value of the MSR ensures backwards comaptibility with the PCD and PWT bit. |
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You will need to modify the PAT if you want Write-Combining cache, which is very useful for framebuffers. |
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== See Also == |
== See Also == |