Paging: Difference between revisions

Say the kernel is loaded to 0x100000. However, it needed to be remapped to 0xc0000000. After loading the kernel, it'll initiate paging, and set up the appropriate tables. (See [[Higher Half Kernel]]) After [[Identity Paging]] the first megabyte,it'll need to create a second table (ie. at entry #768 in the paging directory.) to map 0x100000 to 0xC0000000. The code may be like:

mov eax, 0x0

mov ebx, 0x100000

Enabling paging is actually very simple. All that is needed is to load CR3 with the address of the page directory and to set the paging (PG) and protection (PE) bits of CR0. Note: setting the paging flag when the protection flag is clear causes a general-protection exception.

mov eax, page_directory

mov cr3, eax

To enable PSE (4 MiB pages) the following code is required.

mov eax, cr4

or eax, 0x00000010

NASM example:

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