Paging: Difference between revisions

Jump to navigation Jump to search
[unchecked revision][unchecked revision]
Content deleted Content added
m Added link
mNo edit summary
Line 90: Line 90:


==Physical Address Extension==
==Physical Address Extension==
All Intel processors since Pentium Pro (with exception of the Pentium M at 400 Mhz) and all AMD since the Athlon series implement the Physical Address Extension (PAE). This feature allow you to access to 64 GB (2^36) of RAM. You can check for this feature using CPUID. Once checked you may active this feature in the CR4 register setting bit 5. Once active, the CR3 register points to a table of 4 64bit entries, each one pointing to a page directory made of 4096 bytes (like in normal paging), divided in 512 64bit entries, each pointing to a page table long 4096, divided in 512 64bit page entries.
All Intel processors since Pentium Pro (with exception of the Pentium M at 400 Mhz) and all AMD since the Athlon series implement the Physical Address Extension (PAE). This feature allows you to access up to 64 GB (2^36) of RAM. You can check for this feature using CPUID. Once checked you may active this feature in the CR4 register setting bit 5. Once active, the CR3 register points to a table of 4 64bit entries, each one pointing to a page directory made of 4096 bytes (like in normal paging), divided in 512 64bit entries, each pointing to a page table long 4096, divided in 512 64bit page entries.


==Usage==
==Usage==