PCI IDE Controller: Difference between revisions
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| [unchecked revision] | [unchecked revision] |
Content deleted Content added
m change empty while loops to use braces instead of hard-to-notice semicolons |
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// (XI): Waiting for BSY & DRQ to clear: |
// (XI): Waiting for BSY & DRQ to clear: |
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// ------------------------------------------------------------------ |
// ------------------------------------------------------------------ |
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while (ide_read(channel, ATA_REG_STATUS) & (ATA_SR_BSY | ATA_SR_DRQ)) |
while (ide_read(channel, ATA_REG_STATUS) & (ATA_SR_BSY | ATA_SR_DRQ)){ |
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} |
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return 0; // Easy, ... Isn't it? |
return 0; // Easy, ... Isn't it? |
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