PCI Express: Difference between revisions
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==The PCI Express Bus== |
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The PCI Express bus is a high performance, general purpose I/O interconnect bus, and was designed for a range of computing platforms. One of the key improvements of PCI Express, over the [[PCI|PCI Local Bus]], is that it now uses a serial interface (compared to the parallel interface used by PCI). This improvement can be compared to the similiar serialization of the ATA interface. |
The PCI Express bus is a high performance, general purpose I/O interconnect bus, and was designed for a range of computing platforms. One of the key improvements of PCI Express, over the [[PCI|PCI Local Bus]], is that it now uses a serial interface (compared to the parallel interface used by PCI). This improvement can be compared to the similiar serialization of the ATA interface. |
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{{In Progress}} |
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==PCI Express Link== |
==PCI Express Link== |
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The PCI Express bus connects each device directly to the CPU and other system devices through a pair of high speed unidirectional differential links (transmit and recieve, respectively). These links operate at an effective rate of 2.5 GB/s and a single device may have multiple links. A single device may have x1, x2, x4, x8, x12, x16, or x32 links and can achieve a maximum bandwidth of 80 GB/s by utilizing x32 links. |
The PCI Express bus connects each device directly to the CPU and other system devices through a pair of high speed unidirectional differential links (transmit and recieve, respectively). These links operate at an effective rate of 2.5 GB/s and a single device may have multiple links. A single device may have x1, x2, x4, x8, x12, x16, or x32 links and can achieve a maximum bandwidth of 80 GB/s by utilizing x32 links. |
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==Initialization== |
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==Extended Configuration Space== |
==Extended Configuration Space== |
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ret ; Return to the calling code |
ret ; Return to the calling code |
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</source> |
</source> |
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==System Architecture== |
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==Transaction Layer== |
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==Data Link Layer== |
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==Physical Layer== |
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==Power Management== |
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==See Also== |
==See Also== |
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