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A quick review as I start to reference this tutorial from elsewhere.
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<pre>
<pre>
target: dependency
target: dependency
rule
command
</pre>
</pre>


Note that the rule ''must be tab-indented''. If your editor environment is set to replace tabs with spaces, you have to undo that setting while editing a makefile.
Note that the command ''must be tab-indented''. If your editor environment is set to replace tabs with spaces, you have to undo that setting while editing a makefile.


What makes makefiles so hard to read, for the beginner, is that we are not looking at an imperative program here that is executed top-down; ''make'' reads the ''whole'' makefile, and then hops from rule to rule to satisfy whatever target you gave it on the command line.
What makes makefiles so hard to read, for the beginner, is that we are not looking at an imperative program here that is executed top-down; 'make' reads the ''whole'' makefile, and then hops from rule to rule to satisfy whatever target you gave it on the command line.


I won't go into further details. This is not a man page, but a tutorial, so I will show you how a makefile is build, and the ideas behind each line.
I won't go into further details. This is not a man page, but a tutorial, so I will show you how a makefile is build, and the ideas behind each line.
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== Special macros ==
== Special macros ==


There are some special macros predefined in makefile:
There are several special predefined macros, of which the following are the most useful:

$@ # Name of the file to be made
$? # Changed dependents
$@ # the target of the rule
$^ # All dependencies
$< # the first dependency
$^ # all dependencies
$+ # Like $^, but it keeps duplicates and order
$? # all *changed* dependencies
There are two more special macros used in the implicit rules
$+ # all dependencies, preserving duplicates and ordering
$< # Name of the related file that caused the action

$* # Prefix shared by target and dependent files
Once you get more familiar with 'make', check out the others in the make manual.


== File Lists ==
== File Lists ==
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Compiling the object file actually looks like a side effect. ;-)
Compiling the object file actually looks like a side effect. ;-)


Note that the dependency list of the rule includes the Makefile itself. If you changed e.g. the ''CFLAGS'', you want them to be applied, don't you?
Note that the dependency list of the rule includes the Makefile itself. If you changed e.g. the ''CFLAGS'', you want them to be applied, don't you? Using the $< macro ("first dependency") makes sure we do not attempt to compile the Makefile as C source.


=== The Rest ===
=== The Rest ===