MMX: Difference between revisions
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==MMX== |
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{{stub}} |
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===Introduction=== |
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=== |
===CPUID bits=== |
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To detect MMX |
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The bit for MMX can be found on CPUID page 1, in EDX bit 23. |
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<source lang="asm"> |
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;Check CPUID.01h EDX.MMX (EDX.23) |
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mov eax, 0x1 ;0x.. is not needed, but standardizes |
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cpuid |
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test edx, 1<<23 ;EDX.MMX |
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jnz .MMX ;If no jump MMX is not present |
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</source> |
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===Use today=== |
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It is unlikely that you will come across any MMX code today, as it has been superceded by [[SSE]], and compilers compile SSE code. However, it may be worthwile to be aware of MMX. |
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==See Also== |
==See Also== |
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===SSE=== |
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*[[SSE]] |
*[[SSE]] |
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===X87=== |
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*[[FPU]] |
*[[FPU]] |
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Revision as of 08:21, 29 February 2012
| Real numbers, coprocessors and vector units |
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| Technical |
| X86 implementations |
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MMX is a SIMD technology (single instruction, multiple data) introduced by Intel with ther P5 "Pentium" processor line. It has been superceeded by SSE.
CPUID bits
The bit for MMX can be found on CPUID page 1, in EDX bit 23.