Interrupt Descriptor Table: Difference between revisions

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Change section names to refer to Protected and Long Mode instead of CPU generations.
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The '''Interrupt Descriptor Table''' ('''IDT''') is a binary data structure specific to the [[IA32_Architecture_Family|IA-32]] and [[X86-64|x86-64]] architectures. It is the [[Protected Mode]] and Long Mode counterpart to the [[Real Mode]] Interrupt Vector Table ([[IVT]]) telling the CPU where the [[Interrupt Service Routines]] (ISR) are located (one per interrupt vector). It is similar to the [[Global Descriptor Table]] in structure.
The '''Interrupt Descriptor Table''' ('''IDT''') is a binary data structure specific to the [[IA32_Architecture_Family|IA-32]] and [[X86-64|x86-64]] architectures. It is the '''[[Protected Mode]]''' and '''[[Long Mode]]''' counterpart to the '''[[Real Mode]]''' '''[[Interrupt Vector Table]]''' (IVT), telling the CPU where the [[Interrupt Service Routines]] (ISRs) are located (one per interrupt vector). It is similar to the '''[[Global Descriptor Table]]''' in structure.


The IDT entries are called gates. It can contain Interrupt Gates, Task Gates and Trap Gates.
The '''IDT''' entries are called gates. It can contain Interrupt Gates, Task Gates and Trap Gates.


Before you implement the IDT, make sure you have a working GDT.
Before you implement the '''IDT''', make sure you have a working '''GDT'''.


== IDTR ==
== IDTR ==
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For more information, see '''Section 2.4.3: IDTR Interrupt Descriptor Table Register''' and '''Figure 2-6: Memory Management Registers''' of the Intel Software Developer Manual, Volume 3-A.
For more information, see '''Section 2.4.3: IDTR Interrupt Descriptor Table Register''' and '''Figure 2-6: Memory Management Registers''' of the Intel Software Developer Manual, Volume 3-A.


== Structure on IA-32 ==
== Protected Mode ==


=== Table ===
=== Table ===


On 32-bit processors, the entries in the '''IDT''' are 8 bytes long and form a table like this:
In '''[[Protected Mode]]''', the entries in the '''IDT''' are 8 bytes long and form a table like this:


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* '''Task Gate: 0x85''' (p=1, dpl=0b00, type=0b0101 => type_attributes=0b1000_0101='''0x85''')
* '''Task Gate: 0x85''' (p=1, dpl=0b00, type=0b0101 => type_attributes=0b1000_0101='''0x85''')


== Structure on x86-64 ==
== Long Mode ==


=== Table ===
=== Table ===


On 64-bit processors, the entries in the '''IDT''' are 16 bytes long and form a table like this:
In '''[[Long Mode]]''' (and its associated compatibility modes), the entries in the '''IDT''' are 16 bytes long and form a table like this:


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