Interrupt Descriptor Table: Difference between revisions

Jump to navigation Jump to search
[unchecked revision][unchecked revision]
Content deleted Content added
m Reverted edits by Nunolava1998 (talk) to last revision by Wallbraker
Clear things up
Line 1: Line 1:
The '''Interrupt Descriptor Table''' ('''IDT''') is specific to the IA-32 architecture. It is the [[Protected mode]] counterpart to the [[Real Mode]] Interrupt Vector Table ([[IVT]]) telling where the [[Interrupt Service Routines]] (ISR) are located. It is similar to the [[Global Descriptor Table]] in structure.
The '''Interrupt Descriptor Table''' ('''IDT''') is specific to the IA-32 architecture. It is the [[Protected mode]] counterpart to the [[Real Mode]] Interrupt Vector Table ([[IVT]]) telling where the [[Interrupt Service Routines]] (ISR) are located (one per interrupt vector). It is similar to the [[Global Descriptor Table]] in structure.


The IDT entries are called gates. It can contain Interrupt Gates, Task Gates and Trap Gates.
The IDT entries are called gates. It can contain Interrupt Gates, Task Gates and Trap Gates.
Line 34: Line 34:
</source>
</source>


The <tt>offset</tt> is a 32 bit value, split in two parts. The <tt>selector</tt> is a 16 bit value and must point to a valid selector in your [[GDT]].
The <tt>offset</tt> is a 32 bit value, split in two parts. It represents the address of the entry point of the ISR.


The <tt>selector</tt> is a 16 bit value and must point to a valid selector in your [[GDT]].
<tt>type_attr</tt> is specified here:

The <tt>type_attr</tt> is specified here:
<pre>
<pre>
7 0
7 0
Line 103: Line 105:
</source>
</source>


The <tt>offset</tt> is a 64 bit value, split in three parts. The <tt>selector</tt> is a 16 bit value and must point to a valid selector in your [[GDT]].
The <tt>offset</tt> is a 64 bit value, split in three parts. It represents the address of the entry point of the ISR.


The <tt>selector</tt> is a 16 bit value and must point to a valid selector in your [[GDT]].
<tt>ist</tt> is specified here:

The <tt>ist</tt> is specified here:
<pre>
<pre>
7 0
7 0
Line 113: Line 117:
</pre>
</pre>


<tt>type_attr</tt> is specified here:
The <tt>type_attr</tt> is specified here:
<pre>
<pre>
7 0
7 0
Line 211: Line 215:
==Loading/Storing==
==Loading/Storing==


The IDT is loaded using the <tt>LIDT</tt> assembly instruction. It expects the location of a IDT description structure:
The IDT is loaded using the <tt>LIDT</tt> assembly instruction. It expects the address of a IDT description structure:


Byte:
Byte:
Line 222: Line 226:
+---------------+---------------+---------------+---------------+
+---------------+---------------+---------------+---------------+


The <tt>offset</tt> is the virtual address of the table itself. The <tt>size</tt> is the size of the table subtracted by 1. This structure can be stored to memory again with the <tt>SIDT</tt> instruction.
The <tt>offset</tt> is the virtual address of the table itself. The <tt>size</tt> is the size of the table itself subtracted by 1. This structure can be stored to memory again with the <tt>SIDT</tt> instruction.

To define the structure, one would write:
<source lang="asm">
idt_info:
dw idt_end - idt_start - 1
dd idt_start
</source>

To load the IDT, one would write:
<source lang="asm">
lidt [idt_info]
</source>


==IDT in IA-32e Mode (64-bit IDT)==
==IDT in IA-32e Mode (64-bit IDT)==