ISA: Difference between revisions

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The ISA bus can support x86 16-bit port addresses, but many older ISA cards only support 10-bit address decode. This presents a major problem that can lead to conflict. When the processor tries to access a certain resource on the ISA bus, it will signal all ISA devices in the hopes that only one responds. If a card can only handle ten of the address bits, it can respond to IOR and IOW signals when it should not be, because it does not see the upper bits.

So if a device is located at port 100H, that 10-bit address with every possible combination for the upper 6 bits will map to the same device (e.g port 0xFF00). To make this totally impossible, one can simply restrict PnP port addresses to be within the 1024-byte range to make such conflicts impossible, though this would be a limitation.

So if a device is located at port 100H, that 10-bit address with every possible combination for the upper 6 bits will map to the same device (e.g port 0xFF00). To make this totally impossible, one can simply restrict PnP port addresses to be within the 1024-byte range to make such conflicts impossible, though this would be a limitation. It is also important to note that PCI uses 0CF8-0xCFF, which is above the 10-bit range and cannot be reassigned. Built-in devices reported by the PnP BIOS such as the PCI host bridge should the address range with the top 6 bits masked out. This way, ISA cards cannot be configured in a conflicting manner.

Conflicts are not restricted to IO and should apply to memory too, but any mainboard with an ISA bus and more than 16MB of RAM will probably be smart enough to check addresses before sending them to the ISA bus. They may check IO port addresses too, but it is always best to verify rather than trust 90's era hardware that sometimes had dubious standard compliance.

The decode of legacy devices like the LPT, COM, etc. that are typically embedded in the mainboard are probably 16-bit on PnP boards, but checking with the BIOS is the only way to be sure.

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 The ISA bus can support x86 16-bit port addresses, but many older ISA cards only support 10-bit address decode. This presents a major problem that can lead to conflict. When the processor tries to access a certain resource on the ISA bus, it will signal all ISA devices in the hopes that only one responds. If a card can only handle ten of the address bits, it can respond to IOR and IOW signals when it should not be, because it does not see the upper bits.
-So if a device is located at port 100H, that 10-bit address with every possible combination for the upper 6 bits will map to the same device (e.g port 0xFF00). To make this totally impossible, one can simply restrict PnP port addresses to be within the 1024-byte range to make such conflicts impossible, though this would be a limitation.
+So if a device is located at port 100H, that 10-bit address with every possible combination for the upper 6 bits will map to the same device (e.g port 0xFF00). To make this totally impossible, one can simply restrict PnP port addresses to be within the 1024-byte range to make such conflicts impossible, though this would be a limitation. It is also important to note that PCI uses 0CF8-0xCFF, which is above the 10-bit range and cannot be reassigned. Built-in devices reported by the PnP BIOS such as the PCI host bridge should the address range with the top 6 bits masked out. This way, ISA cards cannot be configured in a conflicting manner.
+Conflicts are not restricted to IO and should apply to memory too, but any mainboard with an ISA bus and more than 16MB of RAM will probably be smart enough to check addresses before sending them to the ISA bus. They may check IO port addresses too, but it is always best to verify rather than trust 90's era hardware that sometimes had dubious standard compliance.
 The decode of legacy devices like the LPT, COM, etc. that are typically embedded in the mainboard are probably 16-bit on PnP boards, but checking with the BIOS is the only way to be sure.

ISA: Difference between revisions

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