IA32 Architecture Family: Difference between revisions

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→‎Intel Processors: Moved SMP column to left.
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==Intel Processors==
==Intel Processors==
This table shows briefly the features of each x86 CPU Intel has made. Items marked Yes are in all processors in that series, No means not (obviously), and Maybe means that some processors have it (usually later steppings).
This table shows briefly the features of each x86 CPU Intel has made. Items marked Yes are in all processors in that series, No means not (obviously), and Maybe means that some processors have it (usually later steppings).
''Note: For the moment this only shows Intel processors, and a lot of processors are incomplete. Wait a while, all will be revealed.'' [[User:Jackscott|JackScott]] 10:19, 3 March 2009 (UTC)
{| {{wikitable}}
{| {{wikitable}}
|-
|-
Line 15: Line 14:
! Hyper-threading
! Hyper-threading
! EM64T/AMD64
! EM64T/AMD64
! Notes
|-
|-
! 8086
! 8086
Line 25: Line 25:
| {{No}}
| {{No}}
| 16bit
| 16bit
|
|-
|-
! 286
! 80286
| 1982
| 1982
| {{No}}
| {{No}}
Line 35: Line 36:
| {{No}}
| {{No}}
| 16bit
| 16bit
|
|-
|-
! 386
! 80386
| 1985
| 1985
| {{Maybe}}
| {{Maybe}}
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| {{No}}
| {{No}}
| {{No}}
| {{No}}
⚫
| Successor to the 80286, the Intel 386 is the first processor of the IA32 architecture. It has 32 bit wide registers, supports 4 kByte paging, and a flat memory model in addition to the segmented memory model of the 80286.
|-
|-
! 486
! 80486
| 1989
| 1989
| {{Yes}}
| {{Yes}}
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| {{No}}
| {{No}}
| {{No}}
| {{No}}
⚫
| The 486 integrates a 80x87 FPU on-chip, and supports power saving functions (System Management Mode, Stop Clock, Auto Halt Powerdown).
|-
|-
! Pentium
! Pentium
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| {{No}}
| {{No}}
| {{No}}
| {{No}}
⚫
| The Pentium supports 4 MiB paging in addition to the usual 4 kByte paging, integrates an APIC and (in later steppings) MMX SIMD registers (single instruction, multiple data). It also supports 2-way multiprocessing.
|-
|-
! Pentium Pro
! Pentium Pro
Line 75: Line 80:
| {{No}}
| {{No}}
| {{No}}
| {{No}}
⚫
| The Pentium Pro supports PAE (36 bit address space), but does not have the MMX registers of the Pentium.

|-
|-
! Pentium II
! Pentium II
Line 86: Line 91:
| {{No}}
| {{No}}
| {{No}}
| {{No}}
⚫
| The Pentium II again supports MMX (as well as PAE), as well as additional low-power states: AutoHALT, Stop-Grant, Sleep, and ~DeepSleep.
|-
|-
! Pentium II Xeon
! Pentium II Xeon
Line 96: Line 102:
| {{No}}
| {{No}}
| {{No}}
| {{No}}
⚫
| The Xeon supports 4/8/+ way multiprocessing.
|-
|-
! Pentium III
! Pentium III
Line 106: Line 113:
| {{No}}
| {{No}}
| {{No}}
| {{No}}
⚫
| The Pentium III supports SSE (128 bit packed single FP SIMD).
|-
|-
! Pentium III Xeon
! Pentium III Xeon
Line 116: Line 124:
| {{No}}
| {{No}}
| {{No}}
| {{No}}
|
|-
|-
! Pentium IV
! Pentium IV
Line 126: Line 135:
| {{Yes}}
| {{Yes}}
| {{Maybe}}
| {{Maybe}}
|
|-
|-
! Pentium M
! Pentium M
Line 136: Line 146:
| {{No}}
| {{No}}
| {{No}}
| {{No}}
|
|-
|-
! Core
! Core
Line 146: Line 157:
| {{No}}
| {{No}}
| {{No}}
| {{No}}
|
|-
|-
! Xeon 51xx
! Xeon 51xx
Line 156: Line 168:
| {{Yes}}
| {{Yes}}
| {{Yes}}
| {{Yes}}
|
|-
|-
! Core 2
! Core 2
Line 166: Line 179:
| {{No}}
| {{No}}
| {{Yes}}
| {{Yes}}
|
|-
|-
! Xeon 54xx
! Xeon 54xx
Line 176: Line 190:
| {{No}}
| {{No}}
| {{Yes}}
| {{Yes}}
|
|-
|-
! Core i7
! Core i7
Line 186: Line 201:
| {{Yes}}
| {{Yes}}
| {{Yes}}
| {{Yes}}
|
|-
|-
! Atom 200/300
! Atom 200/300
Line 196: Line 212:
| {{Yes}}
| {{Yes}}
| {{Yes}}
| {{Yes}}
|
|-
|-
! Atom N-series
! Atom N-series
Line 206: Line 223:
| {{Yes}}
| {{Yes}}
| {{No}}
| {{No}}
|
|-
|-
! Atom Z-series
! Atom Z-series
Line 218: Line 236:
|}
|}


These processors from Intel use the CPUID string "GenuineIntel"
These processors from Intel use the CPUID string "GenuineIntel".

===Intel 386===

⚫
Successor to the 80286, the Intel 386 is the first processor of the IA32 architecture. It has 32 bit wide registers, supports 4 kByte paging, and a flat memory model in addition to the segmented memory model of the 80286.

===Intel 486===

⚫
The 486 integrates a 80x87 FPU on-chip, and supports power saving functions (System Management Mode, Stop Clock, Auto Halt Powerdown).

===Pentium===

⚫
The Pentium supports 4 MiB paging in addition to the usual 4 kByte paging, integrates an APIC and (in later steppings) MMX SIMD registers (single instruction, multiple data). It also supports 2-way multiprocessing.

===Pentium Pro===

⚫
The Pentium Pro supports PAE (36 bit address space), but does not have the MMX registers of the Pentium.

===Pentium II===

⚫
The Pentium II again supports MMX (as well as PAE), as well as additional low-power states: AutoHALT, Stop-Grant, Sleep, and ~DeepSleep.

===Pentium II Xeon===

⚫
The Xeon supports 4/8/+ way multiprocessing.

===Pentium III===

⚫
The Pentium III supports SSE (128 bit packed single FP SIMD).

===Pentium IV / Pentium M===

The Pentium IV as well as the (mobile) Pentium M both support SSE2; the Pentium IV also supports Hyper-Threading (one-chip multiprocessing).

===Core 2 Series (Duo/Quad)===
{{Stub}}

===Core i7 Series===
{{Stub}}

===Atom Series ===
{{Stub}}


==Advanced Micro Device Intel-compatible Processors==
==Advanced Micro Device Intel-compatible Processors==
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