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Line 1: The following tables and notes constitute an overview of the x86-based processors produced (most of which are still available in some form today). These tables are intended as a guide only, the most reliable way to determine CPU features (amongst newer CPUs at least) is by using [[CPUID]]. ~~:''(Information taken from the Intel manuals to give an overview over the individual generation's capabilities.)''~~ The table is fairly easy to read, but a note on some of the values would be helpful. Values marked with '''Yes''' are available in all CPUs in that series, no exceptions. Items marked with '''No''' are not available at all. Items marked with '''Maybe''' are available in some of the CPUs (maybe higher spec'd machines, for instance the 486DX, or in later processor steppings). Items marked with a '''?''' are yet to be researched or confirmed. If you have some information, let us know! ~~==Intel Processors==~~ Most of the information in this table comes from [[Wikipedia:Main_Page\|Wikipedia]], with some coming from the Intel and AMD processor manuals. ~~These processors from Intel use the CPUID string "GenuineIntel"~~ ===Intel ~~386=~~Processors== These processors from Intel use the CPUID string "GenuineIntel". {\| {{wikitable}} Successor to the 80286, the Intel 386 is the first processor of the IA32 architecture. It has 32 bit wide registers, supports 4 kByte paging, and a flat memory model in addition to the segmented memory model of the 80286. \|- ! ! Release Date ! [[FPU\|FPU (80x87)]] ! [[Protected Mode]] ! [[SMP]] ! [[MMX]] ! [[PAE]] ! [[SSE]] ! Hyper-threading ! [[EM64T]]/[[AMD64]] ! Notes \|- ! 8086 \| 1978 \| {{Maybe\|Optional}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}}, 16-bit only \| First processor of the long-lasting x86 ISA, only supporting 16-bit real mode and 64KB segmentation. Eight 16-bit general-purpose registers, four 16-bit segment registers, a 16-bit instruction pointer, and a 16-bit flags register. 256 interrupts available and a 64KB I/O space. \|- ! 80186 \| 1982 \| {{Maybe\|Optional}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}}, 16-bit only \| Designed and intended for embedded systems. First x86 processor with ENTER/LEAVE instructions, as well as PUSHA/POPA, a few other instructions, and immediate modes for PUSH, IMUL, and shift instructions. Exception 06h (Invalid Opcode, #UD) introduced with the UD2 "instruction". \|- ! 80286 \| 1982 \| {{Maybe\|Optional}} \| {{Maybe\|16-bit only}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}}, 16-bit only \| First x86 processor with a "protected mode" and a 24-bit address bus and can not go from pmode to real mode without a CPU reset. It has better performance in real mode than the previous 16-bit Intel processors. Designed for multitasking and multi-user systems. \|- ! 80386 \| 1985 \| {{Maybe\|Optional}} \| {{Yes}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| Successor to the 80286, the Intel 386 is the first processor of the IA32 architecture. It has 32 bit wide registers, supports 4 kByte paging, and a flat memory model in addition to the segmented memory model of the 80286. \|- ! 80486 \| 1989 \| {{Maybe\|Optional}} \| {{Yes}} \| {{Yes}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| The 486 integrates a 80x87 FPU on-chip (not the 486SX though), and supports power saving functions (System Management Mode, Stop Clock, Auto Halt Powerdown). It also supports SMP with an external APIC (though rare), and adds pipelining and on-chip caches, as well as related opcodes such as INVD, INVLPG, XADD and CMPXCHG. \|- ! Pentium \| 1993 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| The Pentium integrates an APIC (which may be permanently disabled by the BIOS), and supports PSE (4 MiB pages). It also supports 2-way multiprocessing. \|- ! Pentium Pro \| 1995 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{No}} \| {{Yes}} \| {{No}} \| {{No}} \| {{No}} \| The Pentium Pro supports PAE (36 bit physical address space with 2 MiB and/or 4 KiB pages), but does not have the MMX registers of the Pentium. \|- ! Pentium MMX \| 1996 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| The Pentium MMX is very similar to the original Pentium CPU, but includes MMX SIMD registers (single instruction, multiple data). It doesn't seem logical, but the Pentium MMX was released after the Pentium Pro. \|- ! Pentium II \| 1997 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{No}} \| {{No}} \| {{No}} \| The Pentium II again supports MMX (as well as PAE), as well as additional low-power states: AutoHALT, Stop-Grant, Sleep, and ~DeepSleep. \|- ! Pentium II Xeon \| 1998 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{No}} \| {{No}} \| {{No}} \| The Xeon supports 4/8/+ way multiprocessing. \|- ! Pentium III \| 1999 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| SSE \| {{No}} \| {{No}} \| Available in speeds from 450MHz to 1400MHz, the Pentium III was the first to support SSE (128 bit packed single FP SIMD). Other than this it was widely similar to the Pentium II Deschutes. \|- ! Pentium III Xeon \| 1999 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| SSE \| {{No}} \| {{No}} \| \|- ! Pentium IV \| 2000 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| SSE2* \| {{Yes}} \| {{Maybe}} \| Intel added both SSE3 and "EMT64/Intel 64" to the Prescott series. \|- ! Pentium M \| 2003 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| SSE2 \| {{No}} \| {{No}} \| \|- ! Core \| 2003 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| SSE3 \| {{No}} \| {{No}} \| \|- ! Xeon 51xx \| 2006 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| SSSE3 \| {{Yes}} \| {{Yes}} \| \|- ! Core 2 \| 2006 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| SSE4.1 \| {{No}} \| {{Yes}} \| \|- ! Xeon 54xx \| 2007 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| SSE4.1 \| {{No}} \| {{Yes}} \| \|- ! Core i-series \| 2008 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| SSE4.2 \| {{Yes}} \| {{Yes}} \| \|- ! Atom 200/300 \| 2008 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| SSSE3 \| {{Yes}} \| {{Yes}} \| \|- ! Atom N-series \| 2008 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| SSSE3 \| {{Yes}} \| {{Maybe}} \| Intel omitted 64-bit mode from the Diamondville (N-2xx) series, but included it with Pineview (N-4xx). \|- ! Atom Z-series \| 2008 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| SSSE3 \| {{Yes}} \| {{No}} \|} ==Advanced Micro Device Intel-compatible Processors== ~~===Intel 486===~~ AMD has been developing integrated circuits since the early 70's, they originally licensed the 80286 from Intel and branded it as the Am286. The company later went on to release its first Intel 386 clone, the Am386, in 1991. The CPUID identifier string is "AuthenticAMD". ~~The 486 integrates a 80x87 FPU on-chip, and supports power saving functions (System Management Mode, Stop Clock, Auto Halt Powerdown).~~ It is important to note that the "SSE" used by AMD and the "SSE" used by Intel may not be entirely compatible. ~~===Pentium===~~ {\| {{wikitable}} The Pentium supports 4 MiB paging in addition to the usual 4 kByte paging, integrates an APIC and (in later steppings) MMX SIMD registers (single instruction, multiple data). It also supports 2-way multiprocessing. \|- ! ! Release Date ! [[FPU\|FPU (80x87)]] ! [[Protected Mode]] ! [[SMP]] ! [[MMX]] ! [[3DNow!]] ! [[PAE]] ! [[SSE]] ! Hyper-threading ! [[EM64T]]/[[AMD64]] ! Notes \|- ! Am386 \| 1991 \| {{Maybe\|Optional}} \| {{Yes}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| AMD's first clone of the 32-bit i386 architecture, FPU was optional. \|- ! Am486 Am5x86 \| 1994 1995 \| {{Yes}} \| {{Yes}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| AMD's 486 clone, 2x the cache size of most of Intel's 486 chips. \|- ! K5 \| 1996 \| {{Yes}} \| {{Yes}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| AMD's first try at a Pentium-compatible CPU. \|- ! K6 \| 1997 \| {{Yes}} \| {{Yes}} \| {{No}} \| {{Yes}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| Actually designed by NexGen (taken over by AMD), the K6 is a fully Pentium-compatible CPU. One notable instruction was the LOOPcc instruction, which executed in 2 cycles compared to a Pentium's 18, causing timing problems. \|- ! K6-2 \| 1998 \| {{Yes}} \| {{Yes}} \| {{No}} \| {{Yes}} \| {{Yes}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| AMD added 16 wait states to the execution of the LOOPcc and thus caused it to slow to the speed of a Pentium. They added a special case (speculation, might be coincidence) for the DEC (E)CX; Jcc combination, which is semantically equivalent with the LOOPcc instruction; since LOOPcc was faster on Intels, nobody used the DEC/Jcc combo there. So AMD kept the original speed for this combo, and specified in their optimization manuals that this was the preferred method over the LOOPcc instruction. The K6-2 also featured the 3DNOW! technology, which was "MMX using floating point numbers", and multiplexed (again) on the floating point registers. It was largely compatible with the P2. ~~===Pentium Pro===~~ \|- ! K6-3 \| 1999 \| {{Yes}} \| {{Yes}} \| {{No}} \| {{Yes}} \| {{Yes}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| This design was fully P2 compatible. The K6-3 suffered from a bottleneck at the instruction decode unit (which converts the x86 instructions to native instructions). While it did have 3 execution units of each type (ALU / MMX / loadstore), they were not used much at all since the instruction decode unit could not keep up. ~~The Pentium Pro supports PAE (36 bit address space), but does not have the MMX registers of the Pentium.~~ \|- ! Athlon \| 1999 \| {{Yes}} \| {{Yes}} \| {{No}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{No}} \| {{No}} \| {{No}} \| \|- ! Athlon XP/MP \| 2001 \| {{Yes}} \| {{Yes}} \| {{Maybe}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| SSE \| {{No}} \| {{No}} \| Athlon XP (starting with Palomino) introduced SSE. SMP capable chips were branded as Athlon MP. \|- ! Athlon 64 \| 2003 \| {{Yes}} \| {{Yes}} \| {{No}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| SSE3 \| {{No}} \| {{Yes}} \| \|- ! Athlon 64 X2 \| 2005 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| SSE3 \| {{No}} \| {{Yes}} \| \|- ! Phenom \| 2007 \| {{Yes}} \| {{Yes}} \| ? \| {{Yes}} \| {{Yes}} \| {{Yes}} \| SSE4a \| {{No}} \| {{Yes}} \| \|- ! Ryzen Series \| 2017 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{No}} \| {{Yes}} \| SSE4.2 \| {{Yes}} \| {{Yes}} \| \|- \|} ===~~Pentium~~AMD64 IIbased CPU's=== These processors all support the entire IA32 family natively. AMD created a new processor, with 48-bit memory addressing and 64-bit calculations, being very compatible with the old style CPU's. So compatible, that the core for 32-bit and 64-bit is essentially identical, aside from the size of calculations and the support of a few encodings that were effectively redundant. They removed a few 1-byte opcodes (about 20 in total, including all 1-byte INC and 1-byte DEC instructions) to make room for a new REX prefix. They modified the core to use 16 registers instead of 8, added a load of new names, got the old software working, and optimized the 32-bit performance. == Other CPU vendors making similar chips== ~~The Pentium II again supports MMX (as well as PAE), as well as additional low-power states: AutoHALT, Stop-Grant, Sleep, and ~DeepSleep.~~ ===~~Pentium II Xeon~~Cyrix=== Cyrix was a well-known CPU vendor from the 386 years (and slightly before), up to Pentium II times, when it more or less vanished inside Via. Via now uses the name as a CPU name (not making it clearer), but this section is about the original Cyrix CPU's. The processors supporting [[CPUID]] call it "CyrixInstead". ~~The Xeon supports 4/8/+ way multiprocessing.~~ ===~~Pentium~~= ~~III~~Cyrix 387 ==== This isn't actually a processor but an FPU. It was the fastest coprocessor to the 386 to be found, and was even very usable aside a 486-SX. ~~The Pentium III supports SSE (128 bit packed single FP SIMD).~~ ===~~Pentium~~= IVCyrix /4x86 ~~Pentium M~~==== A processor that had the abilities of a 486. The first generation plugged into 386 sockets giving greater speeds without requiring extra hardware updates. Later editions could also be used on 486 motherboards. ~~The Pentium IV as well as the (mobile) Pentium M both support SSE2; the Pentium IV also supports Hyper-Threading (one-chip multiprocessing).~~ ===~~Core~~= 2Cyrix ~~Series~~5x86 ~~(Duo/Quad)~~==== ~~{{Stub}}~~ A processor that performed as a 486 and was socket-compatible. It features some of the Pentium's abilities, but not all (such as cmpxchg8b). ~~===Core i7 Series===~~ ~~{{Stub}}~~ ==== Cyrix 6x86 / M1 ==== ~~==Advanced Micro Device Intel-compatible Processors==~~ This processor is, even though the name suggests otherwise, compatible with the 586 (Pentium). It didn't contain any of the MMX or PPro features. It performed slightly better per cycle compared to the Pentium Pro, and was thus given ratings. The performance of floating point operations was lower than that of the Pentium Pro. The biggest competitor to Intel at this time (2004 August). They came into being slightly after Cyrix with a 5k86 (being a 486 compatible similar to the 5x86, don't confuse them) and then followed it up by a K6 processor. This one was faster than the Pentiums, and more popular than the Cyrix ones because they both didn't rate it (afaik), and they didn't overheat (as was claimed, untrue, for the Cyrixes). ==== Cyrix 6x86MX / M2 ==== ~~The CPUID identifier string is "~AuthenticAMD"~~ Was a Pentium MMX compatible processor, also using ratings. It was again socket-compatible to the Pentium MMX and the older Pentiums (without MMX). It supported a few features from the Pentium Pro, among which the very usable CMOVcc set. ~~===K6===~~ The K6 processor was a very nice processor, being Pentium compatible and doing anything the Pentium half could. It became impopular because it was too damn fast, it did a LOOPcc within 2 cycles, where the Pentiums took 18 cycles. ==== MediaGX ==== ~~Because software couldn't handle the sheer speed, it made errors, and thus caused frequent "Blue Screen"s. Microsoft issued a K6 patch which was mandatory for all K6 users.~~ This was a chip that, apart from the CPU, included several peripherals on-chip including graphics and audio devices. ~~===K6-2===~~ AMD had a lesson learned there, don't make your processor too fast in some instructions. Not that they were put off by that, they just added 16 wait states to the execution of the LOOPcc and thus caused it to slow to the speed of a Pentium. AMD didn't just do this however. They added a special case (speculation, might be coincidence) for the DEC (E)CX; Jcc combination, which is semantically equivalent with the LOOPcc instruction, but this semantic equivalence and the loop being faster on Intels caused the loop instruction to always be used. Nobody used the DEC/Jcc combo. They kept the original speed for this combo and specified in their optimization manuals that this was the preferred method over the loopcc instruction. The company was bought by National Semiconductor, who sold the trademark to VIA. The MediaGX was developed further and was eventually bought by AMD who marketed it as the Geode. It also featured a new technology, the 3DNOW! technology, which was MMX using floating point numbers, and multiplexed (again) on the floating point registers. The K6-2 was quite popular, and scaled higher than the P1 ever did. It was largely compatible with the P2, but (afaik) not completely. ===~~K6-3~~ Rise Technologies === ~~They started this design off with the concept of not making it underpowered in any place, and to make it at least P2 compatible. It was fully P2 compatible.~~ A company reputedly producing Pentium-compatible chips, without MMX. Little detail is known, but the CPUID identifier string was "RiseRiseRise", or the same in all 3 dwords (making a search for it very easy). The K6-3 was not too popular, mainly because the K6-2 did very well and people didn't see why they should buy a more expensive K6-3 for the same amount of megahertz. This of course was a joke, same as it is to call a 2GHZ opteron slower than a 2.2GHZ celeron. ==See Also== A little known fact about the K6-3 is that it is in fact an Athlon, minus a few instructions, and minus one very important piece. The K6-3 suffered from a bottleneck at the instruction decode unit (which converts the X86 instructions to native instructions). It could only handle 2 in a cycle, which it made during about 20-30% of the cycles for average software. For optimized software you could bring it to 100% easily, and still want another channel. This wasn't too weird, because it did have 3 execution units of each type (ALU / MMX / loadstore) which were not used much at all. Note that these units are units executing the native instructions, so making 3 of each is not a stupid idea. They needed a new front end, and of course a new copy of instructions from Intel. ===~~Athlon~~ ~~(first~~Articles ~~try)~~=== ===Threads=== The first models of the Athlon were distinct, they were the first time that a competitor to Intel actually had a faster processor, without Intel having a backup plan. It was poised against the PIII, which at that time was their top model and best-running one too. The athlon beat them to the 1GHZ mark, and at that time the 1GHZ had become completely irrelevant. It just meant that they had a new size to mark their processors with. Intel missed the point here, and they did until very shortly ago. The GHZ myth had been broken, the Athlon at 1.1GHZ was still faster than the PIII at 1.3GHZ, and people knew. They didn't go for a P3 if a faster athlon was available at a lower clock speed, and at a lower price. [[Topic:10030\|AT,XT and PC]] === External Links === * [[wikipedia:X86\|x86]] on Wikipedia ~~===Athlon XP / MP / Duron (new style)===~~ AMD switched to a big offensive, trying to persuade the buyers to demand AMD CPU's instead of being OK with Intels. The new versions of these processors were all just a tad better than the previous one, could do a slight number of instructions more (the Athlons started with not even SSE1, and from model 6 (both Athlon and Duron) they supported it). The processors also advanced very slightly in each other direction, making each new type just a tad faster than the previous one. In the end of the GHZ wars (past year, about) the fastest Athlon was running at 2.2GHZ, but outperformed the better half of the 3GHZ P4's. ~~===AMD64 based CPU's===~~ This is slightly offtopic here, but still quite relevant, since these processors all support the entire IA32 family natively. AMD created a new processor, with 64-bit (actually 48-bit, but who notices those 16 bits?) memory addressing and 64-bit calculations, being very compatible with the old style CPU's. So compatible, that the core for 32-bit and 64-bit is essentially equal, aside from the size of calculations and the support of a few encodings that were in effect redundant. They removed a few 1-byte opcodes (about 20 in total, including all 1-byte INC and 1-byte DEC instructions) to make place for a new REX prefix. They modified it to use 16 registers instead of 8, added a load of new names, got the old software working, and optimized the 32-bit performance to unprecedented levels. These CPU's outperform the P4 at any clock speed, in almost (1/20 programs not) any calculation-intensive program. This made them very popular, but also very expensive, The cheapest nowadays is around 180 dollars, or euro's. ~~== Other CPU vendors making similar chips==~~ ~~===Cyrix===~~ Cyrix was a well-known CPU vendor from the 386 years (and slightly before) up to the Pentium II times, when it more or less vanished inside Via. Via now uses the name as a CPU name (not making it clearer), but this section is about the Cyrix CPU's. The processors supporting [[CPUID]] call it a "CyrixInstead" ~~==== Cyrix 387====~~ This isn't actually a processor, but is the most famous Cyrix processor. It was the fastest coprocessor to the 386 to be found, and was even very usable aside a 486-SX. These were the main line of money for Cyrix. ~~==== Cyrix 4x86====~~ A processor that had the abilities of a 486. The first generation plugged into 386 sockets giving greater speeds without requiring extra hardware updates. Later editions could also be used on 486 motherboards. ~~==== Cyrix 5x86====~~ ~~A processor that performed as a 486 and was socket-compatible. It features some of the pentium's abilities, but not all (such as cmpxchg8b).~~ ~~==== Cyrix 6x86 / M1====~~ This processor is, even though the name suggests otherwise, compatible with the 586 (Pentium). It didn't contain any of the MMX or PPro features but is nevertheless very nice. It performed slightly better per cycle compared to the Pentium Pro, and was thus given ratings. This was the time they were loathed for rating their processors, since the performance of floating point operations was lower than that of the Pentium Pro ~~==== Cyrix 6x86MX / M2====~~ Was a Pentium MMX compatible processor, also using ratings which gave it a bad name to start with. It was again socket-compatible to the Pentium MMX and the older Pentiums (without MMX). It supported a few features from the Pentium Pro, among which the very usable CMOVcc set. This however wasn't well known at the time, and nobody seemed to care. ~~==== MediaGX ====~~ ~~This was a chip that apart from the CPU, included several peripherals on-chip including graphics and audio devices.~~ ~~The company was bought by National Semiconductor, who sold the trademark to VIA. The MediaGX was developed further and was eventually bought by AMD who marketed it as the Geode.~~ ~~=== Rise Technologies===~~ I've only heard about this company making Pentium-compatible chips, without MMX, but I don't know any detail but the CPUID identifier string. It just stuck. The string was "RiseRiseRise", or the same in all 3 dwords (making a search for it very easy). ~~==See Also==~~ ~~===Threads===~~ ~~[[Topic:10030\|AT,XT and PC]]~~ [[Category:X86]]