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Revision as of 08:10, 20 September 2011 (view source) Solar (talk \| contribs) (→‎Other CPU vendors making similar chips: Likewise as for the AMD section.) ← Older edit		Latest revision as of 05:15, 21 February 2018 (view source) osdev>Computerfido (→‎Advanced Micro Device Intel-compatible Processors)
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Line 13: ! Release Date ! [[FPU\|FPU (80x87)]] ! [[Protected Mode]] ! [[SMP]] ! [[MMX]] Line 23 ⟶ 24: ! 8086 \| 1978 \| {{Maybe\|Optional}} \| {{No}} \| {{No}} \| {{No}} Line 34 ⟶ 36: ! 80186 \| 1982 \| {{Maybe\|Optional}} \| {{No}} \| {{No}} \| {{No}} Line 45 ⟶ 48: ! 80286 \| 1982 \| {{Maybe\|Optional}} \| {{Maybe\|16-bit only}} \| {{No}} \| {{No}} Line 56 ⟶ 60: ! 80386 \| 1985 \| {{Maybe\|Optional}} \| {{Yes}} \| {{No}} \| {{No}} Line 67 ⟶ 72: ! 80486 \| 1989 \| {{Maybe\|Optional}} \| {{Yes}} \| {{Yes}} \| {{No}} Line 78 ⟶ 84: ! Pentium \| 1993 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 89 ⟶ 96: ! Pentium Pro \| 1995 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 100 ⟶ 108: ! Pentium MMX \| 1996 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 111 ⟶ 120: ! Pentium II \| 1997 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 122 ⟶ 132: ! Pentium II Xeon \| 1998 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 133 ⟶ 144: ! Pentium III \| 1999 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 144 ⟶ 156: ! Pentium III Xeon \| 1999 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 155 ⟶ 168: ! Pentium IV \| 2000 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 166 ⟶ 180: ! Pentium M \| 2003 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 177 ⟶ 192: ! Core \| 2003 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 188 ⟶ 204: ! Xeon 51xx \| 2006 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 199 ⟶ 216: ! Core 2 \| 2006 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 210 ⟶ 228: ! Xeon 54xx \| 2007 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 221 ⟶ 240: ! Core i-series \| 2008 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 232 ⟶ 252: ! Atom 200/300 \| 2008 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 243 ⟶ 264: ! Atom N-series \| 2008 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 254 ⟶ 276: ! Atom Z-series \| 2008 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 264 ⟶ 287: ==Advanced Micro Device Intel-compatible Processors== AMD has been developing integrated circuits since the early 70's, they originally licensed the 80286 from Intel and branded it as the Am286. The company later went on to release its first Intel 386 clone, the Am386, in 1991. ~~AMD came into being slightly after Cyrix with a 5k86 (being a 486 compatible similar to the 5x86, don't confuse them), followed up by the K6 processor.~~ The CPUID identifier string is "AuthenticAMD". It is important to note that the "SSE" used by AMD and the "SSE" used by Intel ~~are actually~~may not ~~compatible,~~be ~~not~~entirely ~~fully at least~~compatible. ~~This causes lots of confusion. (Somebody verify this claim?)~~ {\| {{wikitable}} Line 275 ⟶ 298: ! Release Date ! [[FPU\|FPU (80x87)]] ! [[Protected Mode]] ! [[SMP]] ! [[MMX]] Line 283 ⟶ 307: ! [[EM64T]]/[[AMD64]] ! Notes \|- ! Am386 \| 1991 \| {{Maybe\|Optional}} \| {{Yes}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| {{No}} \| AMD's first clone of the 32-bit i386 architecture, FPU was optional. \|- ! Am486 Line 288 ⟶ 325: \| 1994 1995 \| {{Yes}} \| {{Yes}} \| {{No}} Line 300 ⟶ 338: ! K5 \| 1996 \| {{Yes}} \| {{Yes}} \| {{No}} \| {{No}} \| {{No}} \| ?{{No}} \| {{No}} \| {{No}} Line 312 ⟶ 351: ! K6 \| 1997 \| {{Yes}} \| {{Yes}} \| {{No}} \| {{Yes}} \| {{No}} \| ?{{No}} \| {{No}} \| {{No}} Line 324 ⟶ 364: ! K6-2 \| 1998 \| {{Yes}} \| {{Yes}} \| {{No}} \| {{Yes}} \| {{Yes}} ~~\| ?~~ ~~\| ?~~ \| {{No}} \| {{No}} \| {{No}} \| AMD added 16 wait states to the execution of the LOOPcc and thus caused it to slow to the speed of a Pentium. They added a special case (speculation, might be coincidence) for the DEC (E)CX; Jcc combination, which is semantically equivalent with the LOOPcc instruction; since LOOPcc was faster on Intels, nobody used the DEC/Jcc combo there. So AMD kept the original speed for this combo, and specified in their optimization manuals that this was the preferred method over the loopcc instruction.▼ \| {{No}} ▲\| AMD added 16 wait states to the execution of the LOOPcc and thus caused it to slow to the speed of a Pentium. They added a special case (speculation, might be coincidence) for the DEC (E)CX; Jcc combination, which is semantically equivalent with the LOOPcc instruction; since LOOPcc was faster on Intels, nobody used the DEC/Jcc combo there. So AMD kept the original speed for this combo, and specified in their optimization manuals that this was the preferred method over the ~~loopcc~~LOOPcc instruction. The K6-2 also featured the 3DNOW! technology, which was "MMX using floating point numbers", and multiplexed (again) on the floating point registers. It was largely compatible with the P2~~, but (afaik) not completely~~. \|- ! K6-3 \| 1999 \| {{Yes}} \| ?{{Yes}} \| {{No}} \| {{Yes}} \| {{Yes}} \| ?{{No}} \| ?{{No}} \| {{No}} \| {{No}} Line 353 ⟶ 395: \| 1999 \| {{Yes}} \| ?{{Yes}} \| {{No}} \| {{Yes}} \| {{Yes}} Line 364 ⟶ 407: ! Athlon XP/MP \| 2001 \| {{Yes}} \| {{Yes}} \| {{Maybe}} Line 376 ⟶ 420: ! Athlon 64 \| 2003 \| {{Yes}} \| {{Yes}} \| {{No}} Line 388 ⟶ 433: ! Athlon 64 X2 \| 2005 \| {{Yes}} \| {{Yes}} \| {{Yes}} Line 400 ⟶ 446: ! Phenom \| 2007 \| {{Yes}} \| {{Yes}} \| ? Line 407 ⟶ 454: \| SSE4a \| {{No}} \| {{Yes}} \| \|- ! Ryzen Series \| 2017 \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{Yes}} \| {{No}} \| {{Yes}} \| SSE4.2 \| {{Yes}} \| {{Yes}} \|