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→Advanced Micro Device Intel-compatible Processors
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The following tables and notes constitute an overview of the x86-based processors produced (most of which are still available in some form today). These tables are intended as a guide only, the most reliable way to determine CPU features (amongst newer CPUs at least) is by using [[CPUID]].
The table is fairly easy to read, but a note on some of the values would be helpful. Values marked with '''Yes''' are available in all CPUs in that series, no exceptions. Items marked with '''No''' are not available at all. Items marked with '''Maybe''' are available in some of the CPUs (maybe higher
Most of the information in this table comes from [[Wikipedia:Main_Page|Wikipedia]], with some coming from the Intel and AMD processor manuals.
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! Release Date
! [[FPU|FPU (80x87)]]
! [[Protected Mode]]
! [[SMP]]
! [[MMX]]
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! 8086
| 1978
| {{Maybe|Optional}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}, 16-bit only
| First processor of the long-lasting x86 ISA, only supporting 16-bit real mode and 64KB segmentation. Eight 16-bit general-purpose registers, four 16-bit segment registers, a 16-bit instruction pointer, and a 16-bit flags register. 256 interrupts available and a 64KB I/O space.
Line 34 ⟶ 36:
! 80186
| 1982
| {{Maybe|Optional}}
| {{No}}
| {{No}}
| {{No}}
Line 45 ⟶ 48:
! 80286
| 1982
| {{Maybe|Optional}}
| {{Maybe|16-bit only}}
| {{No}}
| {{No}}
Line 56 ⟶ 60:
! 80386
| 1985
| {{Maybe|Optional}}
| {{Yes}}
| {{No}}
| {{No}}
Line 67 ⟶ 72:
! 80486
| 1989
| {{Maybe|Optional}}
| {{
| {{Yes}}
| {{No}}
| {{No}}
Line 74 ⟶ 80:
| {{No}}
| {{No}}
| The 486 integrates a 80x87 FPU on-chip (not the 486SX though), and supports power saving functions (System Management Mode, Stop Clock, Auto Halt Powerdown). It also supports SMP with an external APIC (though rare), and adds pipelining and on-chip caches, as well as related opcodes such as INVD, INVLPG, XADD and CMPXCHG.
|-
! Pentium
| 1993
| {{Yes}}
| {{Yes}}
| {{Yes}}
Line 85 ⟶ 92:
| {{No}}
| {{No}}
| The Pentium integrates an APIC (which may be permanently disabled by the BIOS), and supports PSE (
|-
! Pentium Pro
| 1995
| {{Yes}}
| {{Yes}}
| {{Yes}}
Line 100 ⟶ 108:
! Pentium MMX
| 1996
| {{Yes}}
| {{Yes}}
| {{Yes}}
Line 111 ⟶ 120:
! Pentium II
| 1997
| {{Yes}}
| {{Yes}}
| {{Yes}}
Line 122 ⟶ 132:
! Pentium II Xeon
| 1998
| {{Yes}}
| {{Yes}}
| {{Yes}}
Line 133 ⟶ 144:
! Pentium III
| 1999
| {{Yes}}
| {{Yes}}
| {{Yes}}
Line 144 ⟶ 156:
! Pentium III Xeon
| 1999
| {{Yes}}
| {{Yes}}
| {{Yes}}
Line 159 ⟶ 172:
| {{Yes}}
| {{Yes}}
| {{Yes}}
| SSE2*
|
| {{Maybe}}
| Intel added both SSE3 and "EMT64/Intel 64" to the Prescott series.
|-
! Pentium M
| 2003
| {{Yes}}
| {{Yes}}
| {{Yes}}
Line 177 ⟶ 192:
! Core
| 2003
| {{Yes}}
| {{Yes}}
| {{Yes}}
Line 188 ⟶ 204:
! Xeon 51xx
| 2006
| {{Yes}}
| {{Yes}}
| {{Yes}}
Line 199 ⟶ 216:
! Core 2
| 2006
| {{Yes}}
| {{Yes}}
| {{Yes}}
Line 204 ⟶ 222:
| {{Yes}}
| SSE4.1
| {{No}}
| {{Yes}}
|
Line 210 ⟶ 228:
! Xeon 54xx
| 2007
| {{Yes}}
| {{Yes}}
| {{Yes}}
Line 219 ⟶ 238:
|
|-
! Core
| 2008
| {{Yes}}
| {{Yes}}
| {{Yes}}
Line 232 ⟶ 252:
! Atom 200/300
| 2008
| {{Yes}}
| {{Yes}}
| {{Yes}}
Line 243 ⟶ 264:
! Atom N-series
| 2008
| {{Yes}}
| {{Yes}}
| {{Yes}}
Line 249 ⟶ 271:
| SSSE3
| {{Yes}}
| {{
| Intel omitted 64-bit mode from the Diamondville (N-2xx) series, but included it with Pineview (N-4xx).
|-
! Atom Z-series
| 2008
| {{Yes}}
| {{Yes}}
| {{Yes}}
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==Advanced Micro Device Intel-compatible Processors==
AMD has been developing integrated circuits since the early 70's, they originally licensed the 80286 from Intel and branded it as the Am286. The company later went on to release its first Intel 386 clone, the Am386, in 1991.
The CPUID identifier string is "
It is important to note that the "SSE" used by AMD and the "SSE" used by Intel
{| {{wikitable}}
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! Release Date
! [[FPU|FPU (80x87)]]
! [[Protected Mode]]
! [[SMP]]
! [[MMX]]
Line 283 ⟶ 307:
! [[EM64T]]/[[AMD64]]
! Notes
|-
! Am386
| 1991
| {{Maybe|Optional}}
| {{Yes}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| AMD's first clone of the 32-bit i386 architecture, FPU was optional.
|-
! Am486
Am5x86
| 1994
1995
| {{Yes}}
| {{Yes}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| AMD's 486 clone, 2x the cache size of most of Intel's 486 chips.
|-
! K5
| 1996
| {{Yes}}
| {{Yes}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| AMD's first try at a Pentium-compatible CPU.
|-
! K6
| 1997
| {{Yes}}
| {{Yes}}
| {{No}}
| {{Yes}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| Actually designed by NexGen (taken over by AMD), the K6 is a fully Pentium-compatible CPU. One notable instruction was the LOOPcc instruction, which executed in 2 cycles compared to a Pentium's 18, causing timing problems.
|-
! K6-2
| 1998
| {{Yes}}
| {{Yes}}
| {{No}}
| {{Yes}}
| {{Yes}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| AMD added 16 wait states to the execution of the LOOPcc and thus caused it to slow to the speed of a Pentium. They added a special case (speculation, might be coincidence) for the DEC (E)CX; Jcc combination, which is semantically equivalent with the LOOPcc instruction; since LOOPcc was faster on Intels, nobody used the DEC/Jcc combo there. So AMD kept the original speed for this combo, and specified in their optimization manuals that this was the preferred method over the LOOPcc instruction.
|-
! K6-3
| 1999
| {{Yes}}
|
| {{No}}
| {{Yes}}
| {{Yes}}
| {{No}}
| {{No}}
| {{No}}
| {{No}}
| This design was fully P2 compatible.
|-
! Athlon
| 1999
| {{Yes}}
| {{Yes}}
| {{No}}
| {{Yes}}
|
|
| {{No}}
| {{No}}
| {{No}}
|
|-
! Athlon XP/MP
| 2001
| {{Yes}}
| {{Yes}}
| {{Maybe}}
| {{Yes}}
| {{Yes}}
| {{Yes}}
| SSE
| {{No}}
| {{No}}
| Athlon XP (starting with Palomino) introduced SSE. SMP capable chips were branded as Athlon MP.
|-
! Athlon 64
| 2003
| {{Yes}}
| {{Yes}}
| {{No}}
| {{Yes}}
|
|
| SSE3
| {{No}}
| {{Yes}}
|
|-
! Athlon 64 X2
| 2005
| {{Yes}}
| {{Yes}}
| {{Yes}}
| {{Yes}}
| {{Yes}}
| {{Yes}}
| SSE3
| {{No}}
| {{Yes}}
|
|-
! Phenom
| 2007
| {{Yes}}
| {{Yes}}
| ?
| {{Yes}}
| {{Yes}}
| {{Yes}}
| SSE4a
| {{No}}
| {{Yes}}
|
|-
! Ryzen Series
| 2017
| {{Yes}}
| {{Yes}}
| {{Yes}}
| {{Yes}}
| {{No}}
| {{Yes}}
| SSE4.2
| {{Yes}}
| {{Yes}}
|
|-
|}
===AMD64 based CPU's===
== Other CPU vendors making similar chips==
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===Cyrix===
Cyrix was a well-known CPU vendor from the 386 years (and slightly before), up to
==== Cyrix 387 ====
This isn't actually a processor
==== Cyrix 4x86 ====
A processor that had the abilities of a 486. The first generation plugged into 386 sockets giving greater speeds without requiring extra hardware updates. Later editions could also be used on 486 motherboards.
==== Cyrix 5x86 ====
A processor that performed as a 486 and was socket-compatible. It features some of the Pentium's abilities, but not all (such as cmpxchg8b).
==== Cyrix
This processor is, even though the name suggests otherwise, compatible with the 586 (Pentium). It didn't contain any of the MMX or PPro features. It performed slightly better per cycle compared to the Pentium Pro, and was thus given ratings. The performance of floating point operations was lower than that of the Pentium Pro.
==== Cyrix 6x86MX / M2 ====
Was a Pentium MMX compatible processor, also using ratings. It was again socket-compatible to the Pentium MMX and the older Pentiums (without MMX). It supported a few features from the Pentium Pro, among which the very usable CMOVcc set.
==== MediaGX ====
This was a chip that, apart from the CPU, included several peripherals on-chip including graphics and audio devices.
The company was bought by National Semiconductor, who sold the trademark to VIA. The MediaGX was developed further and was eventually bought by AMD who marketed it as the Geode.
=== Rise Technologies ===
==See Also==
|