HPET: Difference between revisions
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==Interrupt routing== |
==Interrupt routing== |
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===Legacy routing using PIC=== |
===Legacy routing using PIC=== |
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===Routing via I/O APIC== |
===Routing via I/O APIC=== |
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===FSB interrupts=== |
===FSB interrupts=== |
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Revision as of 14:39, 25 June 2013
This page is a work in progress.
This page may thus be incomplete. Its content may be changed in the near future.
- This page, right now, is going to be my diary of my adventures with HPET, but somewhere in the future, when support for HPET is complete in my kernel, I'll turn it into regular wiki page.
Preface
HPET, or High Precision Event Timer, is a piece of hardware designed by Intel and Microsoft to replace older PIT and RTC. It consists of (usually 64-bit) main counter (which counts up), as well as from 3 to 256 32 or 64 bit wide comparators. HPET is programmed using memory mapped IO, and the base address of HPET can be found using ACPI.