CPU Registers x86: Difference between revisions
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====Control registers==== |
====Control registers==== |
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======CR0====== |
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{| {{wikitable}} |
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! bit |
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| cr0 |
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! label |
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| cr1 |
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! description |
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| cr2 |
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|- |
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| cr3 |
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| 0 |
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| pe |
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| protected mode enable |
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|- |
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| 1 |
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| mp |
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| monitor co-processor |
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|- |
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| 2 |
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| em |
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| emulation |
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|- |
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| 3 |
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| ts |
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| task switched |
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| 4 |
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| et |
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| extension type |
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| 5 |
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| ne |
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| numeric error |
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| 16 |
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| wp |
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| write protect |
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| 18 |
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| am |
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| alignment mask |
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|- |
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| 29 |
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| nw |
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| not-write through |
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|- |
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| 30 |
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| cd |
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| cache disable |
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| 31 |
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| pg |
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| paging |
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|- |
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==== |
======CR1====== |
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Reserved |
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======CR2====== |
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{| {{wikitable}} |
{| {{wikitable}} |
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|- |
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! bit |
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| dr0 |
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! label |
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| dr1 |
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! description |
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| dr2 |
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|- |
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| dr3 |
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| 0-31 |
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| pfla |
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| page fault linear address |
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| dr6 |
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| dr7 |
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|- |
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==== |
======CR3====== |
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TODO |
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======CR4====== |
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{| {{wikitable}} |
{| {{wikitable}} |
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|- |
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! bit |
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| tr3 |
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! label |
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| tr4 |
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! description |
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| tr5 |
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|- |
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| tr6 |
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| 0 |
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| vme |
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| virtual 8086 mode extensions |
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|- |
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| 1 |
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| pvi |
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| protected mode virtual interrupts |
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|- |
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| 2 |
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| tsd |
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| time stamp disable |
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|- |
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| 3 |
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| de |
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| debugging extensions |
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|- |
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| 4 |
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| pse |
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| page size extension |
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|- |
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| 5 |
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| pae |
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| physical address extension |
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|- |
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| 6 |
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| mce |
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| machine check exception |
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| 7 |
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| pge |
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| page global enable |
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| 8 |
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| pce |
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| performance monitoring counter enable |
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| 9 |
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| osfxsr |
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| os support for fxsave and fxrstor instructions |
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|- |
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| 10 |
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| osxmmexcpt |
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| os support for unmasked simd floating point exceptions |
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|- |
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| 13 |
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| vmxe |
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| virtual machine extensions enable |
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|- |
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| 14 |
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| smxe |
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| safer mode extensions enable |
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| 17 |
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| pcide |
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| pcid enable |
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| 18 |
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| osxsave |
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| xsave and processor extended states enable |
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|- |
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| 20 |
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| smep |
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| supervisor mode executions protection enable |
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|- |
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| 21 |
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| smap |
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| supervisor mode access protection enable |
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|- |
|- |
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|} |
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==== |
====Debug registers==== |
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TODO |
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====Test registers==== |
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TODO |
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====Pmode segmentation registers==== |
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{| {{wikitable}} |
{| {{wikitable}} |
Revision as of 19:10, 11 March 2015
CPU Registers are small amounts of memory located in the processor. They provide a fast way to process data.
x86 registers
General purpose registers
32 bit | 16 bit | 8 high bit | 8 low bit | description |
---|---|---|---|---|
eax | ax | ah | al | accumulator |
ebx | bx | bh | bl | base |
ecx | cx | ch | cl | counter |
edx | dx | dh | dl | data |
Segment registers
16 bit | description |
---|---|
cs | code segment |
ds | data segment |
es, fs, gs | extra segment |
ss | stack segment |
Index registers
32 bit | 16 bit | description |
---|---|---|
esi | si | source index |
edi | di | destination index |
Pointer registers
32 bit | 16 bit | description |
---|---|---|
ebp | bp | base pointer |
esp | sp | stack pointer |
eip | ip | index pointer |
EFLAGS register
bit | label | description |
---|---|---|
0 | cf | carry flag |
2 | pf | parity flag |
4 | af | auxiliary flag |
6 | zf | zero flag |
7 | sf | sign flag |
8 | tf | trap flag |
9 | if | interrupt flag |
10 | df | direction flag |
11 | of | overflow flag |
12-13 | iopl | i/o priviledge level |
14 | nt | nested task flag |
16 | rf | resume flag |
17 | vm | virtual 8086 mode flag |
18 | ac | alignment check flag |
19 | vif | virtual interrupt flag |
20 | vip | virtual interrupt pending |
21 | id | id flag |
Control registers
CR0
bit | label | description |
---|---|---|
0 | pe | protected mode enable |
1 | mp | monitor co-processor |
2 | em | emulation |
3 | ts | task switched |
4 | et | extension type |
5 | ne | numeric error |
16 | wp | write protect |
18 | am | alignment mask |
29 | nw | not-write through |
30 | cd | cache disable |
31 | pg | paging |
CR1
Reserved
CR2
bit | label | description |
---|---|---|
0-31 | pfla | page fault linear address |
CR3
TODO
CR4
bit | label | description |
---|---|---|
0 | vme | virtual 8086 mode extensions |
1 | pvi | protected mode virtual interrupts |
2 | tsd | time stamp disable |
3 | de | debugging extensions |
4 | pse | page size extension |
5 | pae | physical address extension |
6 | mce | machine check exception |
7 | pge | page global enable |
8 | pce | performance monitoring counter enable |
9 | osfxsr | os support for fxsave and fxrstor instructions |
10 | osxmmexcpt | os support for unmasked simd floating point exceptions |
13 | vmxe | virtual machine extensions enable |
14 | smxe | safer mode extensions enable |
17 | pcide | pcid enable |
18 | osxsave | xsave and processor extended states enable |
20 | smep | supervisor mode executions protection enable |
21 | smap | supervisor mode access protection enable |
Debug registers
TODO
Test registers
TODO
Pmode segmentation registers
gdtr | global descriptor table register |
idtr | interrupt descriptor table register |
ldtr | local descriptor table register |
tr | task register |