CPUID: Difference between revisions

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→‎Checking CPUID availability: increase comment quality
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<source lang="asm">
<source lang="asm">
pushfd ; preserve EFLAGS to restore at the end of routine
pushfd ;Save EFLAGS
pushfd ;Store EFLAGS

pushfd ; store EFLAGS (working copy)
xor dword [esp],0x00200000 ;Invert the ID bit in stored EFLAGS
xor dword [esp], 0x00200000 ; invert ID bit in our copy of EFLAGS
popfd ;Load stored EFLAGS (with ID bit inverted)
popfd ; attempt storing _altered_ EFLAGS
pushfd ;Store EFLAGS again (ID bit may or may not be inverted)
pop eax ;eax = modified EFLAGS (ID bit may or may not be inverted)

pushfd ; Store EFLAGS again (ID bit may or may not be inverted)
xor eax,[esp] ;eax = whichever bits were changed
pop eax ; eax = modified EFLAGS (ID bit may or may not be inverted)
popfd ;Restore original EFLAGS
xor eax, [esp] ; eax = whichever bits were changed
and eax,0x00200000 ;eax = zero if ID bit can't be changed, else non-zero
ret

popfd ; restore original EFLAGS
and eax, 0x00200000 ; eax = zero if ID bit can't be changed, else non-zero
ret
</source>
</source>


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Note 2: You can simply attempt to execute the CPUID instruction and see if you get an invalid opcode exception. This avoids problems with CPUs that do support CPUID but don't support the ID bit in EFLAGS; and is likely to be faster for CPUs that do support CPUID (and slower for CPUs that don't).
Note 2: You can simply attempt to execute the CPUID instruction and see if you get an invalid opcode exception. This avoids problems with CPUs that do support CPUID but don't support the ID bit in EFLAGS; and is likely to be faster for CPUs that do support CPUID (and slower for CPUs that don't).




=== Basic usage ===
=== Basic usage ===